From: Archit Taneja <architt@codeaurora.org>
To: robdclark@gmail.com
Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
Archit Taneja <architt@codeaurora.org>
Subject: [PATCH 05/10] drm/msm/dsi: Set up runtime PM for DSI
Date: Fri, 28 Jul 2017 16:17:03 +0530 [thread overview]
Message-ID: <20170728104708.20635-6-architt@codeaurora.org> (raw)
In-Reply-To: <20170728104708.20635-1-architt@codeaurora.org>
Call the pm_runtime_get/put API where we need the clocks enabled.
The main entry/exit points are 1) enabling/disabling the DSI bridge
and 2) Sending commands from the DSI host to the device.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 11 +++++++++++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 +-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index c7b612c3d771..da0913a33ca0 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -221,6 +221,8 @@ static const struct msm_dsi_cfg_handler *dsi_get_config(
goto put_gdsc;
}
+ pm_runtime_get_sync(dev);
+
ret = regulator_enable(gdsc_reg);
if (ret) {
pr_err("%s: unable to enable gdsc\n", __func__);
@@ -247,6 +249,7 @@ static const struct msm_dsi_cfg_handler *dsi_get_config(
clk_disable_unprepare(ahb_clk);
disable_gdsc:
regulator_disable(gdsc_reg);
+ pm_runtime_put_autosuspend(dev);
put_clk:
clk_put(ahb_clk);
put_gdsc:
@@ -1713,6 +1716,8 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
goto fail;
}
+ pm_runtime_enable(&pdev->dev);
+
msm_host->cfg_hnd = dsi_get_config(msm_host);
if (!msm_host->cfg_hnd) {
ret = -EINVAL;
@@ -1786,6 +1791,8 @@ void msm_dsi_host_destroy(struct mipi_dsi_host *host)
mutex_destroy(&msm_host->clk_mutex);
mutex_destroy(&msm_host->cmd_mutex);
mutex_destroy(&msm_host->dev_mutex);
+
+ pm_runtime_disable(&msm_host->pdev->dev);
}
int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
@@ -1881,6 +1888,7 @@ int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
* mdss interrupt is generated in mdp core clock domain
* mdp clock need to be enabled to receive dsi interrupt
*/
+ pm_runtime_get_sync(&msm_host->pdev->dev);
dsi_clk_ctrl(msm_host, 1);
/* TODO: vote for bus bandwidth */
@@ -1912,6 +1920,7 @@ void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
/* TODO: unvote for bus bandwidth */
dsi_clk_ctrl(msm_host, 0);
+ pm_runtime_put_autosuspend(&msm_host->pdev->dev);
}
int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
@@ -2217,6 +2226,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host,
goto unlock_ret;
}
+ pm_runtime_get_sync(&msm_host->pdev->dev);
ret = dsi_clk_ctrl(msm_host, 1);
if (ret) {
pr_err("%s: failed to enable clocks. ret=%d\n", __func__, ret);
@@ -2269,6 +2279,7 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host)
pinctrl_pm_select_sleep_state(&msm_host->pdev->dev);
dsi_clk_ctrl(msm_host, 0);
+ pm_runtime_put_autosuspend(&msm_host->pdev->dev);
dsi_host_regulator_disable(msm_host);
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index 0c2eb9c9a1fc..7c9bf91bc22b 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -373,7 +373,7 @@ static int dsi_phy_enable_resource(struct msm_dsi_phy *phy)
static void dsi_phy_disable_resource(struct msm_dsi_phy *phy)
{
clk_disable_unprepare(phy->ahb_clk);
- pm_runtime_put_sync(&phy->pdev->dev);
+ pm_runtime_put_autosuspend(&phy->pdev->dev);
}
static const struct of_device_id dsi_phy_dt_match[] = {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2017-07-28 10:47 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-28 10:46 [PATCH 00/10] drm/msm: Runtime PM for MDP5 based devices Archit Taneja
2017-07-28 10:46 ` [PATCH 01/10] drm/msm/mdp5: Fix typo in encoder_enable path Archit Taneja
2017-07-28 10:47 ` [PATCH 02/10] drm/msm/mdp5: Drop clock names with "_clk" suffix Archit Taneja
2017-07-28 10:47 ` [PATCH 03/10] drm/msm/mdp5: Use runtime PM get/put API instead of toggling clocks Archit Taneja
2017-07-28 10:47 ` [PATCH 04/10] drm/msm/hdmi: Set up runtime PM for HDMI Archit Taneja
2017-07-28 10:47 ` Archit Taneja [this message]
2017-07-28 10:47 ` [PATCH 06/10] drm/msm/dsi: Implement RPM suspend/resume callbacks Archit Taneja
2017-07-28 10:47 ` [PATCH 07/10] drm/msm/mdp5: Don't use mode_set helper funcs for encoders and CRTCs Archit Taneja
2017-07-28 10:47 ` [PATCH 08/10] drm/msm/mdp5: Write to SMP registers even if allocations don't change Archit Taneja
2017-07-28 10:47 ` [PATCH 09/10] drm/msm/mdp5: Set up runtime PM for MDSS Archit Taneja
2017-07-28 10:47 ` [PATCH 10/10] drm/msm/adreno: Prevent unclocked access when retrieving timestamps Archit Taneja
2017-07-28 13:52 ` Jordan Crouse
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