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From: Manasi Navare <manasi.d.navare@intel.com>
To: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
Date: Fri, 22 Dec 2017 15:39:41 -0800	[thread overview]
Message-ID: <20171222233941.GC29006@intel.com> (raw)
In-Reply-To: <1513980170-2988-1-git-send-email-anusha.srivatsa@intel.com>

On Fri, Dec 22, 2017 at 02:02:50PM -0800, Anusha Srivatsa wrote:
> Forward Error Correction is supported on DP 1.4.
> This patch adds corresponding DPCD register definitions.
> 
> v2: Add dri-devel mailing list to the CC list(Jani)
> 
> v3: Change names, add missing masks (Manasi)
> 
> Cc: dri-devel@lists.freedesktop.org
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index da58a42..4f75034 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -284,6 +284,36 @@
>  # define DP_DSC_BITS_PER_PIXEL_1_2          0x3
>  # define DP_DSC_BITS_PER_PIXEL_1            0x4
>  
> +/* DP Forward error Correction Registers */
> +#define DP_FEC_CAPABILITY		    0x090
> +# define DP_FEC_CAPABLE			    (1 << 0)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP  (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP    (1 << 2)
> +# define DP_FEC_BIT_ERROR_COUNT_CAP	    (1 << 3)
> +
> +#define DP_FEC_CONFIGURATION		    0x120
> +# define DP_FEC_READY			    (1 << 0)
> +# define DP_FEC_ERR_COUNT_DIS		    (0 << 1)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT	    (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT	    (2 << 1)
> +# define DP_FEC_BIT_ERROR_COUNT		    (3 << 1)
> +# define DP_FEC_ERR_COUNT_SEL_MASK	    (0xFF)

This mask should be with a proper shift to obtain only the
ERR_COUNT_SEL bits. It should be (0xff << 4). See all other mask defines.

After that change,

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> +# define DP_FEC_LANE_0_SELECT		    (0 << 4)
> +# define DP_FEC_LANE_1_SELECT		    (1 << 4)
> +# define DP_FEC_LANE_2_SELECT		    (2 << 4)
> +# define DP_FEC_LANE_3_SELECT		    (3 << 4)
> +
> +#define DP_FEC_STATUS			    0x280
> +# define DP_FEC_DECODE_EN_DETECTED	    (1 << 0)
> +# define DP_FEC_DECODE_DIS_DETECTED	    (1 << 1)
> +
> +#define DP_FEC_ERROR_COUNT_LSB		    0x0281
> +
> +#define DP_FEC_ERROR_COUNT_MSB		    0x0282
> +# define DP_FEC_ERROR_COUNT_MASK	    0x7F
> +# define DP_FEC_ERR_COUNT_SHIFT		    8
> +# define DP_FEC_ERR_COUNT_VALID		    (1 << 7)
> +
>  #define DP_PSR_SUPPORT                      0x070   /* XXX 1.2? */
>  # define DP_PSR_IS_SUPPORTED                1
>  # define DP_PSR2_IS_SUPPORTED		    2	    /* eDP 1.4 */
> -- 
> 2.7.4
> 
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  reply	other threads:[~2017-12-22 23:39 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-22 22:02 [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature Anusha Srivatsa
2017-12-22 23:39 ` Manasi Navare [this message]
  -- strict thread matches above, loose matches on Subject: below --
2018-02-14  7:59 Anusha Srivatsa
2018-02-14 11:59 ` Jani Nikula
2018-02-14 19:28 ` Anusha Srivatsa
2018-02-15 13:53   ` Jani Nikula
2017-11-28  0:55 Anusha Srivatsa
2017-12-21 20:36 ` Manasi Navare
2017-12-21 20:51   ` Srivatsa, Anusha

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