From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: matthew.s.atwood@intel.com
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] Intel: Add a Kaby Lake PCI ID
Date: Tue, 24 Apr 2018 11:18:21 -0700 [thread overview]
Message-ID: <20180424181821.GN27583@intel.com> (raw)
In-Reply-To: <1524592505-29467-1-git-send-email-matthew.s.atwood@intel.com>
On Tue, Apr 24, 2018 at 10:55:05AM -0700, matthew.s.atwood@intel.com wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
please add the message:
Based on kernel commit '672e314b21dc ("drm/i915/kbl: Add KBL GT2 sku")'
>
> v2: name change M -> ULX, add enumeration in KBL ULX
>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
> intel/intel_chipset.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index 01d250e..f479bc4 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -200,7 +200,8 @@
> #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921
> #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915
> #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E
> -#define PCI_CHIP_KABYLAKE_ULX_GT2 0x591E
> +#define PCI_CHIP_KABYLAKE_ULX_GT2_0 0x591E
> +#define PCI_CHIP_KABYLAKE_ULX_GT2_1 0x591C
> #define PCI_CHIP_KABYLAKE_DT_GT2 0x5912
> #define PCI_CHIP_KABYLAKE_M_GT2 0x5917
> #define PCI_CHIP_KABYLAKE_DT_GT1 0x5902
The define itself isn't enough... you still missed the enable part:
#define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULX_GT2_...
sorry for not being clear about the "enable" part on previous review.
> --
> 2.7.4
>
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next prev parent reply other threads:[~2018-04-24 18:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-23 22:08 [PATCH] Intel: Add a Kaby Lake PCI ID matthew.s.atwood
2018-04-24 17:42 ` Rodrigo Vivi
2018-04-24 17:46 ` Rodrigo Vivi
2018-04-24 17:55 ` matthew.s.atwood
2018-04-24 18:18 ` Rodrigo Vivi [this message]
2018-04-24 19:05 ` matthew.s.atwood
2018-04-24 19:42 ` matthew.s.atwood
2018-04-24 20:06 ` Rodrigo Vivi
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