From mboxrd@z Thu Jan  1 00:00:00 1970
From: Thierry Reding <thierry.reding@gmail.com>
Subject: Re: [PATCH] drm/panel: simple: AUO P320HVN03 uses SPWG data ordering
Date: Fri, 18 May 2018 12:12:27 +0200
Message-ID: <20180518101227.GA5312@ulmo>
References: <20180411152741.22483-1-l.stach@pengutronix.de>
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To: Lucas Stach <l.stach@pengutronix.de>
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--===============0009755637==
Content-Type: multipart/signed; micalg=pgp-sha256;
	protocol="application/pgp-signature"; boundary="zYM0uCDKw75PZbzx"
Content-Disposition: inline


--zYM0uCDKw75PZbzx
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Wed, Apr 11, 2018 at 05:27:41PM +0200, Lucas Stach wrote:
> The patch adding support for the AUO P320HVN03 panel was written against a
> preliminary datasheet, which specified JEIDA data ordering. Testing with
> real hardware has shown that the actually used data ordering is SPWG.
>=20
> Fixes: 70c0d5b783f5 (drm/panel: simple: add support for AUO P320HVN03)
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks.

Thierry

--zYM0uCDKw75PZbzx
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlr+pwgACgkQ3SOs138+
s6HkaBAAq8NovcNG/yRD5Uwzb6H5b66I106eennFmUYvpOUfWntFLJZfhT+qqR6u
HLupdaXgf31g8wDtFqtwad1IUOY8YvERB6i90vM8nGyv/+G+QalS4McVdN4RKWux
RWPCSp6roMqkBSJfsm7pQZzJKXZz3JGzbc4+A1RNo/X51vTO9YUSVzknTxAC7z1B
q1gatGegSSviMmzy5MHgzhmrMe/H/CayMbgrFcwBu+gg1M05nqiNUonSsiK1p8Ke
2YtxomceeY8zi+I/rdV7CyIADEKcMAEi3d25l8ATmtM84hIpfh4qZJ8e4lQnKn6s
UtStH5QtH0pF78MMw5yScyoiZ3IFZdQIhK3CLNgvFc11MGsXRreU9/zxhNc3Cgh7
Z5xHN1EUH9WyoSJ0D0wYF8Htf4eYKkAHSHKUE0XkxF1NV9eEnzHJ6f8do9cw9cRp
VK+GThNIqpggmkH/i++nTF2b6Au+SVdtfKWoCM3KK/CfAM9K0j2PVsRekGF7pYBw
/MbACk4fOB6ZQWZbFRKdN6LQj8Iq0GKgNtl8loKhwZ8ab6MhbFsgU6F55LG1S84E
4pcWTMloZ+ix/FZt1qRD5JAtY6sb//13qCt5A2Jmye4IDMpEU7RU70bJGEy7JcyM
XcMNXxqbqHRhiGpk6gauc7Gz5aKY0BfjjINbcpd6f43758ee9Rk=
=PGeG
-----END PGP SIGNATURE-----

--zYM0uCDKw75PZbzx--

--===============0009755637==
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: base64
Content-Disposition: inline

X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs
IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz
dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==

--===============0009755637==--