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* [PATCH] drm/panel: simple: AUO P320HVN03 uses SPWG data ordering
@ 2018-04-11 15:27 Lucas Stach
  2018-05-18 10:12 ` Thierry Reding
  0 siblings, 1 reply; 2+ messages in thread
From: Lucas Stach @ 2018-04-11 15:27 UTC (permalink / raw)
  To: Thierry Reding; +Cc: kernel, dri-devel, patchwork-lst

The patch adding support for the AUO P320HVN03 panel was written against a
preliminary datasheet, which specified JEIDA data ordering. Testing with
real hardware has shown that the actually used data ordering is SPWG.

Fixes: 70c0d5b783f5 (drm/panel: simple: add support for AUO P320HVN03)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/gpu/drm/panel/panel-simple.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 5591984a392b..bd15567ba484 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -664,7 +664,7 @@ static const struct panel_desc auo_p320hvn03 = {
 		.enable = 450,
 		.unprepare = 500,
 	},
-	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
 };
 
 static const struct drm_display_mode auo_t215hvn01_mode = {
-- 
2.16.1

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2018-04-11 15:27 [PATCH] drm/panel: simple: AUO P320HVN03 uses SPWG data ordering Lucas Stach
2018-05-18 10:12 ` Thierry Reding

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