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From: Hans de Goede <j.w.r.degoede@gmail.com>
To: "Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Daniel Vetter" <daniel@ffwll.ch>
Cc: Hans de Goede <hdegoede@redhat.com>,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH 1/4] drm/i915/intel_dsi: Allow calling intel_dsi_get_pclk with a NULL config
Date: Tue, 19 Jun 2018 22:18:24 +0200	[thread overview]
Message-ID: <20180619201827.4257-2-hdegoede@redhat.com> (raw)
In-Reply-To: <20180619201827.4257-1-hdegoede@redhat.com>

Allow calling intel_dsi_get_pclk without passing in an intel_crtc_state.

This is a preparation patch for reading back the GOP configured DSI
clk during probe.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/gpu/drm/i915/intel_dsi_pll.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index 2ff2ee7f3b78..71ce6e3157d4 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -279,8 +279,10 @@ static u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
 	pll_div = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_DIVIDER);
 	mutex_unlock(&dev_priv->sb_lock);
 
-	config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK;
-	config->dsi_pll.div = pll_div;
+	if (config) {
+		config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK;
+		config->dsi_pll.div = pll_div;
+	}
 
 	/* mask out other bits and extract the P1 divisor */
 	pll_ctl &= DSI_PLL_P1_POST_DIV_MASK;
@@ -330,6 +332,7 @@ static u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
 static u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
 			    struct intel_crtc_state *config)
 {
+	u32 ctrl;
 	u32 pclk;
 	u32 dsi_clk;
 	u32 dsi_ratio;
@@ -342,9 +345,12 @@ static u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
 		return 0;
 	}
 
-	config->dsi_pll.ctrl = I915_READ(BXT_DSI_PLL_CTL);
+	ctrl = I915_READ(BXT_DSI_PLL_CTL);
+
+	if (config)
+		config->dsi_pll.ctrl = ctrl;
 
-	dsi_ratio = config->dsi_pll.ctrl & BXT_DSI_PLL_RATIO_MASK;
+	dsi_ratio = ctrl & BXT_DSI_PLL_RATIO_MASK;
 
 	dsi_clk = (dsi_ratio * BXT_REF_CLOCK_KHZ) / 2;
 
-- 
2.17.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-06-19 20:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-19 20:18 [PATCH 0/4] drm/i915/intel_dsi: Read back and use pclk set by the GOP Hans de Goede
2018-06-19 20:18 ` Hans de Goede [this message]
2018-06-19 20:18 ` [PATCH 2/4] drm/i915/intel_dsi: Move initialization of encoder variables up a bit Hans de Goede
2018-06-19 20:18 ` [PATCH 3/4] drm/i915/intel_dsi: Make intel_connector_get_hw_state() non static Hans de Goede
2018-06-19 20:18 ` [PATCH 4/4] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk Hans de Goede
2018-07-06 14:16   ` Ville Syrjälä
2018-07-07  6:32     ` Hans de Goede
2018-07-09 17:37       ` Rodrigo Vivi
2018-07-09 17:43         ` Hans de Goede
2018-07-09 18:14       ` Ville Syrjälä
2018-07-10  7:03         ` Hans de Goede
2018-06-29 11:35 ` [PATCH 0/4] drm/i915/intel_dsi: Read back and use pclk set by the GOP Hans de Goede
2018-07-06 13:14   ` Jani Nikula
2018-07-07  6:10     ` Hans de Goede

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