From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: matthew.s.atwood@intel.com
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT
Date: Mon, 23 Jul 2018 15:19:45 -0700 [thread overview]
Message-ID: <20180723221944.GZ16907@intel.com> (raw)
In-Reply-To: <20180723212735.23893-2-matthew.s.atwood@intel.com>
On Mon, Jul 23, 2018 at 02:27:35PM -0700, matthew.s.atwood@intel.com wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
>
> According to DP spec (2.9.3.1 of DP 1.4) if
> EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD
> 02200h through 0220Fh shall contain the DPRX's true capability. These
> values will match 00000h through 0000Fh, except for DPCD_REV,
> MAX_LINK_RATE, DOWN_STREAM_PORT_PRESENT.
>
> Read from DPCD once for all 3 values as this is an expensive operation.
> Spec mentions that all of address space 02200h through 0220Fh should
> contain the right information however currently only 3 values can
> differ.
>
> There is no address space in the intel_dp->dpcd struct for addresses
> 02200h through 0220Fh, and since so much of the data is a identical,
> simply overwrite the values stored in 00000h through 0000Fh with the
> values that can be overwritten from addresses 02200h through 0220Fh.
>
> This patch helps with backward compatibility for devices pre DP1.3.
>
> v2: read only dpcd values which can be affected, remove incorrect check,
> split into drm include changes into separate patch, commit message,
> verbose debugging statements during overwrite.
> v3: white space fixes
> v4: make path dependent on DPCD revision > 1.2
> v5: split into function, removed DPCD rev check
>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 54 +++++++++++++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index dde92e4af5d3..ed16b93bfe40 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3731,6 +3731,58 @@ intel_dp_link_down(struct intel_encoder *encoder,
> }
> }
>
> +static void
> +intel_dp_extended_receiver_capabilities(struct intel_dp *intel_dp)
> +{
> + /*
> + * Prior to DP1.3 the bit represented by
> + * DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
> + * if it is set DP_DPCD_REV at 0000h could be at a value less than
> + * the true capability of the panel. The only way to check is to
> + * then compare 0000h and 2200h.
> + */
> + if (intel_dp->dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> + DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT) {
> + uint8_t dpcd_ext[6];
> +
> + DRM_DEBUG_KMS("DPCD: Extended Receiver Capability Field Present, accessing 02200h through 022FFh\n");
> +
> + if (drm_dp_dpcd_read(&intel_dp->aux, DP_DP13_DPCD_REV,
> + &dpcd_ext, sizeof(dpcd_ext)) < 0)
DRM_ERROR
> + return;
> +
> + if (intel_dp->dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV])
DRM_DEBUG_KMS
> + return;
The silent skip will be hard to debug and we will never know where it went
wrong.
> +
> + if (memcmp(&intel_dp->dpcd[DP_DPCD_REV], &dpcd_ext[DP_DPCD_REV],
> + sizeof(u8))) {
> + DRM_DEBUG_KMS("DPCD: new value for DPCD Revision previous value %2x new value %2x\n",
> + intel_dp->dpcd[DP_DPCD_REV],
> + dpcd_ext[DP_DPCD_REV]);
> + memcpy(&intel_dp->dpcd[DP_DPCD_REV],
> + &dpcd_ext[DP_DPCD_REV], sizeof(u8));
> + }
> + if (memcmp(&intel_dp->dpcd[DP_MAX_LINK_RATE],
> + &dpcd_ext[DP_MAX_LINK_RATE], sizeof(u8))) {
> + DRM_DEBUG_KMS("DPCD: new value for DPCD Max Link Rate previous value %2x new value %2x\n",
> + intel_dp->dpcd[DP_MAX_LINK_RATE],
> + dpcd_ext[DP_MAX_LINK_RATE]);
> + memcpy(&intel_dp->dpcd[DP_MAX_LINK_RATE],
> + &dpcd_ext[DP_MAX_LINK_RATE], sizeof(u8));
> + }
> + if (memcmp(&intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT],
> + &dpcd_ext[DP_DOWNSTREAMPORT_PRESENT], sizeof(u8))) {
> + DRM_DEBUG_KMS("DPCD: new value for DPCD Downstream Port Present previous value %2x new value %2x\n",
> + intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT],
> + dpcd_ext[DP_DOWNSTREAMPORT_PRESENT]);
> + memcpy(&intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT],
> + &dpcd_ext[DP_DOWNSTREAMPORT_PRESENT],
> + sizeof(u8));
> + }
> + }
> +}
> +
> +
> bool
> intel_dp_read_dpcd(struct intel_dp *intel_dp)
> {
> @@ -3738,6 +3790,8 @@ intel_dp_read_dpcd(struct intel_dp *intel_dp)
> sizeof(intel_dp->dpcd)) < 0)
> return false; /* aux transfer failed */
>
> + intel_dp_extended_receiver_capabilities(intel_dp);
> +
> DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd);
>
> return intel_dp->dpcd[DP_DPCD_REV] != 0;
> --
> 2.17.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-07-23 22:19 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-23 21:27 [PATCH 1/2] drm/dp: add extended receiver capability field present bit matthew.s.atwood
2018-07-23 21:27 ` [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT matthew.s.atwood
2018-07-23 22:19 ` Rodrigo Vivi [this message]
2018-07-24 16:30 ` Rodrigo Vivi
2018-07-24 16:29 ` [PATCH 1/2] drm/dp: add extended receiver capability field present bit Rodrigo Vivi
2018-08-14 23:25 ` Manasi Navare
2018-08-14 23:56 ` Manasi Navare
-- strict thread matches above, loose matches on Subject: below --
2018-07-20 16:18 matthew.s.atwood
2018-07-20 16:18 ` [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT matthew.s.atwood
2018-07-20 17:47 ` Rodrigo Vivi
2018-07-20 17:55 ` Manasi Navare
2018-07-17 21:49 [PATCH 1/2] drm/dp: add extended receiver capability field present bit matthew.s.atwood
2018-07-17 21:49 ` [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT matthew.s.atwood
2018-07-19 20:35 ` [PATCH 1/2] drm/dp: add extended receiver capability field present bit matthew.s.atwood
2018-07-19 20:35 ` [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT matthew.s.atwood
2018-07-19 21:07 ` Rodrigo Vivi
2018-07-19 21:47 ` Atwood, Matthew S
2018-07-19 22:06 ` Rodrigo Vivi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180723221944.GZ16907@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=matthew.s.atwood@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).