From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH 1/2] drm/dp: add extended receiver capability field present bit Date: Tue, 24 Jul 2018 09:29:32 -0700 Message-ID: <20180724162932.GF16907@intel.com> References: <20180723212735.23893-1-matthew.s.atwood@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20180723212735.23893-1-matthew.s.atwood@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: matthew.s.atwood@intel.com Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org T24gTW9uLCBKdWwgMjMsIDIwMTggYXQgMDI6Mjc6MzRQTSAtMDcwMCwgbWF0dGhldy5zLmF0d29v ZEBpbnRlbC5jb20gd3JvdGU6Cj4gRnJvbTogTWF0dCBBdHdvb2QgPG1hdHRoZXcucy5hdHdvb2RA aW50ZWwuY29tPgo+IAo+IFRoaXMgYml0IHdhcyBhZGRlZCB0byBEUCBUcmFpbmluZyBBdXggUkQg aW50ZXJ2YWwgd2l0aCBEUCAxLjMuIFZpYQo+IGRlc2NyaXB0aWlvbiBvZiB0aGUgc3BlYyB0aGlz IGZpZWxkIGluZGljYXRlcyB0aGUgcGFuZWxzIHRydWUKPiBjYXBhYmlsaXRpZXMgYXJlIGRlc2Ny aWJlZCBpbiBEUENEIGFkZHJlc3Mgc3BhY2UgMDIyMDBoIHRocm91Z2ggMDIyRkZoLgo+IAo+IHYy OiB2ZXJzaW9uIGNvbW1lbnQgdXBkYXRlCj4gdjM6IHZlcnNpb24gY29tbWVudCBjb3JyZWN0aW9u LCBjb21taXQgbWVzc2FnZSB1cGRhdGUKPiB2NDogd2hpdGUgc3BhY2UgY29ycmVjdGlvbgoKSSdt IGFmcmFpZCB0aGUgd3Jvbmcgc3BhY2UgdGhhdCBJIGhhZCBtZW50aW9uZWQgaXQgaXMgc3RpbGwg dGhlcmUKcy8iKDEgPDwgNykvKiBEUCAxLjMgKi8iLyIoMSA8PCA3KSAvKiBEUCAxLjMgKiIvZwoK PiAKPiBTaWduZWQtb2ZmLWJ5OiBNYXR0IEF0d29vZCA8bWF0dGhldy5zLmF0d29vZEBpbnRlbC5j b20+Cj4gLS0tCj4gIGluY2x1ZGUvZHJtL2RybV9kcF9oZWxwZXIuaCB8IDUgKysrLS0KPiAgMSBm aWxlIGNoYW5nZWQsIDMgaW5zZXJ0aW9ucygrKSwgMiBkZWxldGlvbnMoLSkKPiAKPiBkaWZmIC0t Z2l0IGEvaW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oIGIvaW5jbHVkZS9kcm0vZHJtX2RwX2hl bHBlci5oCj4gaW5kZXggYzAxNTY0OTkxYTlmLi40NGFhZWZkYzg0NDggMTAwNjQ0Cj4gLS0tIGEv aW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4gKysrIGIvaW5jbHVkZS9kcm0vZHJtX2RwX2hl bHBlci5oCj4gQEAgLTEyMyw4ICsxMjMsOSBAQAo+ICAjIGRlZmluZSBEUF9GUkFNSU5HX0NIQU5H RV9DQVAJCSAgICAoMSA8PCAxKQo+ICAjIGRlZmluZSBEUF9EUENEX0RJU1BMQVlfQ09OVFJPTF9D QVBBQkxFICAgICAoMSA8PCAzKSAvKiBlZHAgdjEuMiBvciBoaWdoZXIgKi8KPiAgCj4gLSNkZWZp bmUgRFBfVFJBSU5JTkdfQVVYX1JEX0lOVEVSVkFMICAgICAgICAgMHgwMGUgICAvKiBYWFggMS4y PyAqLwo+IC0jIGRlZmluZSBEUF9UUkFJTklOR19BVVhfUkRfTUFTSyAgICAgICAgICAgIDB4N0Yg ICAgLyogWFhYIDEuMj8gKi8KPiArI2RlZmluZSBEUF9UUkFJTklOR19BVVhfUkRfSU5URVJWQUwg ICAgICAgICAgICAgMHgwMGUgICAvKiBYWFggMS4yPyAqLwo+ICsjIGRlZmluZSBEUF9UUkFJTklO R19BVVhfUkRfTUFTSyAgICAgICAgICAgICAgICAweDdGICAgIC8qIERQIDEuMyAqLwo+ICsjIGRl ZmluZSBEUF9FWFRFTkRFRF9SRUNFSVZFUl9DQVBfRklFTERfUFJFU0VOVAkoMSA8PCA3KS8qIERQ IDEuMyAqLwogICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgXiBoZXJlCgo+ICAKPiAgI2RlZmluZSBEUF9BREFQVEVSX0NBUAkJCSAg ICAweDAwZiAgIC8qIDEuMiAqLwo+ICAjIGRlZmluZSBEUF9GT1JDRV9MT0FEX1NFTlNFX0NBUAkg ICAgKDEgPDwgMCkKPiAtLSAKPiAyLjE3LjEKPiAKX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlz dHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4v bGlzdGluZm8vaW50ZWwtZ2Z4Cg==