From mboxrd@z Thu Jan 1 00:00:00 1970 From: Manasi Navare Subject: Re: [PATCH 1/2] drm/dp: add extended receiver capability field present bit Date: Tue, 14 Aug 2018 16:56:46 -0700 Message-ID: <20180814235645.GA30875@intel.com> References: <20180723212735.23893-1-matthew.s.atwood@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20180723212735.23893-1-matthew.s.atwood@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: matthew.s.atwood@intel.com Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, rodrigo.vivi@intel.com List-Id: dri-devel@lists.freedesktop.org UHVzaGVkIHRvIGRybS1taXNjLW5leHQgd2l0aCB0aGUgd2hpdGVzcGFjZSBmaXguClRoYW5rcyBm b3IgdGhlIHBhdGNoLgoKUmVnYXJkcwpNYW5hc2kKCk9uIE1vbiwgSnVsIDIzLCAyMDE4IGF0IDAy OjI3OjM0UE0gLTA3MDAsIG1hdHRoZXcucy5hdHdvb2RAaW50ZWwuY29tIHdyb3RlOgo+IEZyb206 IE1hdHQgQXR3b29kIDxtYXR0aGV3LnMuYXR3b29kQGludGVsLmNvbT4KPiAKPiBUaGlzIGJpdCB3 YXMgYWRkZWQgdG8gRFAgVHJhaW5pbmcgQXV4IFJEIGludGVydmFsIHdpdGggRFAgMS4zLiBWaWEK PiBkZXNjcmlwdGlpb24gb2YgdGhlIHNwZWMgdGhpcyBmaWVsZCBpbmRpY2F0ZXMgdGhlIHBhbmVs cyB0cnVlCj4gY2FwYWJpbGl0aWVzIGFyZSBkZXNjcmliZWQgaW4gRFBDRCBhZGRyZXNzIHNwYWNl IDAyMjAwaCB0aHJvdWdoIDAyMkZGaC4KPiAKPiB2MjogdmVyc2lvbiBjb21tZW50IHVwZGF0ZQo+ IHYzOiB2ZXJzaW9uIGNvbW1lbnQgY29ycmVjdGlvbiwgY29tbWl0IG1lc3NhZ2UgdXBkYXRlCj4g djQ6IHdoaXRlIHNwYWNlIGNvcnJlY3Rpb24KPiAKPiBTaWduZWQtb2ZmLWJ5OiBNYXR0IEF0d29v ZCA8bWF0dGhldy5zLmF0d29vZEBpbnRlbC5jb20+Cj4gLS0tCj4gIGluY2x1ZGUvZHJtL2RybV9k cF9oZWxwZXIuaCB8IDUgKysrLS0KPiAgMSBmaWxlIGNoYW5nZWQsIDMgaW5zZXJ0aW9ucygrKSwg MiBkZWxldGlvbnMoLSkKPiAKPiBkaWZmIC0tZ2l0IGEvaW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBl ci5oIGIvaW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4gaW5kZXggYzAxNTY0OTkxYTlmLi40 NGFhZWZkYzg0NDggMTAwNjQ0Cj4gLS0tIGEvaW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4g KysrIGIvaW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4gQEAgLTEyMyw4ICsxMjMsOSBAQAo+ ICAjIGRlZmluZSBEUF9GUkFNSU5HX0NIQU5HRV9DQVAJCSAgICAoMSA8PCAxKQo+ICAjIGRlZmlu ZSBEUF9EUENEX0RJU1BMQVlfQ09OVFJPTF9DQVBBQkxFICAgICAoMSA8PCAzKSAvKiBlZHAgdjEu MiBvciBoaWdoZXIgKi8KPiAgCj4gLSNkZWZpbmUgRFBfVFJBSU5JTkdfQVVYX1JEX0lOVEVSVkFM ICAgICAgICAgMHgwMGUgICAvKiBYWFggMS4yPyAqLwo+IC0jIGRlZmluZSBEUF9UUkFJTklOR19B VVhfUkRfTUFTSyAgICAgICAgICAgIDB4N0YgICAgLyogWFhYIDEuMj8gKi8KPiArI2RlZmluZSBE UF9UUkFJTklOR19BVVhfUkRfSU5URVJWQUwgICAgICAgICAgICAgMHgwMGUgICAvKiBYWFggMS4y PyAqLwo+ICsjIGRlZmluZSBEUF9UUkFJTklOR19BVVhfUkRfTUFTSyAgICAgICAgICAgICAgICAw eDdGICAgIC8qIERQIDEuMyAqLwo+ICsjIGRlZmluZSBEUF9FWFRFTkRFRF9SRUNFSVZFUl9DQVBf RklFTERfUFJFU0VOVAkoMSA8PCA3KS8qIERQIDEuMyAqLwo+ICAKPiAgI2RlZmluZSBEUF9BREFQ VEVSX0NBUAkJCSAgICAweDAwZiAgIC8qIDEuMiAqLwo+ICAjIGRlZmluZSBEUF9GT1JDRV9MT0FE X1NFTlNFX0NBUAkgICAgKDEgPDwgMCkKPiAtLSAKPiAyLjE3LjEKPiAKX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJ bnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Au b3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==