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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@freedesktop.org, dri-devel@freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH libdrm 3/4] intel: make gen10 use generic gen macro
Date: Fri, 24 Aug 2018 16:56:48 -0700	[thread overview]
Message-ID: <20180824235649.19444-4-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20180824235649.19444-1-lucas.demarchi@intel.com>

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 intel/intel_chipset.h | 33 +--------------------------------
 1 file changed, 1 insertion(+), 32 deletions(-)

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 163fb536..82f3b5a0 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -246,21 +246,6 @@
 #define PCI_CHIP_WHISKEYLAKE_U_GT3_2     0x3EA3
 #define PCI_CHIP_WHISKEYLAKE_U_GT3_3     0x3EA4
 
-#define PCI_CHIP_CANNONLAKE_0		0x5A51
-#define PCI_CHIP_CANNONLAKE_1		0x5A59
-#define PCI_CHIP_CANNONLAKE_2		0x5A41
-#define PCI_CHIP_CANNONLAKE_3		0x5A49
-#define PCI_CHIP_CANNONLAKE_4		0x5A52
-#define PCI_CHIP_CANNONLAKE_5		0x5A5A
-#define PCI_CHIP_CANNONLAKE_6		0x5A42
-#define PCI_CHIP_CANNONLAKE_7		0x5A4A
-#define PCI_CHIP_CANNONLAKE_8		0x5A50
-#define PCI_CHIP_CANNONLAKE_9		0x5A40
-#define PCI_CHIP_CANNONLAKE_10		0x5A54
-#define PCI_CHIP_CANNONLAKE_11		0x5A5C
-#define PCI_CHIP_CANNONLAKE_12		0x5A44
-#define PCI_CHIP_CANNONLAKE_13		0x5A4C
-
 #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \
 				 (devid) == PCI_CHIP_I915_GM || \
 				 (devid) == PCI_CHIP_I945_GM || \
@@ -527,23 +512,6 @@
 				 IS_GEMINILAKE(devid) || \
 				 IS_COFFEELAKE(devid))
 
-#define IS_CANNONLAKE(devid)	((devid) == PCI_CHIP_CANNONLAKE_0 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_1 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_2 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_3 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_4 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_5 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_6 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_7 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_8 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_9 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_10 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_11 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_12 || \
-				 (devid) == PCI_CHIP_CANNONLAKE_13)
-
-#define IS_GEN10(devid)		(IS_CANNONLAKE(devid))
-
 /* New platforms use kernel pci ids */
 #include "i915_pciids.h"
 
@@ -563,6 +531,7 @@ struct pci_device_id {
 			break;						\
 	__i < __n;})
 
+#define IS_GEN10(devid) IS_GENX(CNL, devid)
 #define IS_GEN11(devid) IS_GENX(ICL_11, devid)
 
 /* all platforms */
-- 
2.17.1

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  parent reply	other threads:[~2018-08-24 23:56 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-24 23:56 [PATCH libdrm 0/4] intel: rework how we add PCI IDs Lucas De Marchi
2018-08-24 23:56 ` [PATCH libdrm 1/4] intel: add IS_GENX() generic macro Lucas De Marchi
2018-08-25  9:35   ` Chris Wilson
2018-08-27 21:19     ` Lucas De Marchi
2018-08-27 21:40       ` Chris Wilson
2018-08-27 23:15         ` Lucas De Marchi
2018-08-28  1:00     ` Lucas De Marchi
2018-08-28  8:38       ` Chris Wilson
2018-08-28 16:16         ` Lucas De Marchi
2018-08-24 23:56 ` [PATCH libdrm 2/4] intel: make gen11 use generic gen macro Lucas De Marchi
2018-08-24 23:56 ` Lucas De Marchi [this message]
2018-08-24 23:56 ` [PATCH libdrm 4/4] intel: make gen9 " Lucas De Marchi

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