From: jacopo mondi <jacopo@jmondi.org>
To: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Cc: linux-renesas-soc@vger.kernel.org, Ulrich Hecht <uli@fpond.eu>,
Kieran Bingham <kieran.bingham@ideasonboard.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v2 08/16] drm: rcar-du: Enable configurable DPAD0 routing on Gen3
Date: Mon, 17 Sep 2018 14:56:30 +0200 [thread overview]
Message-ID: <20180917125630.GM16851@w540> (raw)
In-Reply-To: <20180914091046.483-9-laurent.pinchart+renesas@ideasonboard.com>
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Hi Laurent,
On Fri, Sep 14, 2018 at 12:10:38PM +0300, Laurent Pinchart wrote:
> All Gen3 SoCs supported so far have a fixed association between DPAD0
> and DU channels, which led to hardcoding that association when writing
> the corresponding hardware register. The D3 and E3 will break that
> mechanism as DPAD0 can be dynamically connected to either DU0 or DU1.
>
> Make DPAD0 routing dynamic on Gen3. To ensure a valid hardware
> configuration when the DU starts without the RGB output enabled, DPAD0
> is associated at initialization time to the first DU channel that it can
> be connected to. This makes no change on Gen2 as all Gen2 SoCs can
> connected DPAD0 to DU0, which is the current implicit default value.
>
> As the DPAD0 source is always 0 when a single source is possible on
> Gen2, we can also simplify the Gen2 code in the same function to remove
> a conditional check.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Please add my:
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
> drivers/gpu/drm/rcar-du/rcar_du_group.c | 17 ++++++-----------
> drivers/gpu/drm/rcar-du/rcar_du_kms.c | 12 ++++++++++++
> 2 files changed, 18 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
> index 4c62841eff2f..f38703e7a10d 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
> @@ -56,8 +56,6 @@ static void rcar_du_group_setup_pins(struct rcar_du_group *rgrp)
> static void rcar_du_group_setup_defr8(struct rcar_du_group *rgrp)
> {
> struct rcar_du_device *rcdu = rgrp->dev;
> - unsigned int possible_crtcs =
> - rcdu->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs;
> u32 defr8 = DEFR8_CODE;
>
> if (rcdu->info->gen < 3) {
> @@ -69,21 +67,18 @@ static void rcar_du_group_setup_defr8(struct rcar_du_group *rgrp)
> * DU instances that support it.
> */
> if (rgrp->index == 0) {
> - if (possible_crtcs > 1)
> - defr8 |= DEFR8_DRGBS_DU(rcdu->dpad0_source);
> + defr8 |= DEFR8_DRGBS_DU(rcdu->dpad0_source);
> if (rgrp->dev->vspd1_sink == 2)
> defr8 |= DEFR8_VSCS;
> }
> } else {
> /*
> - * On Gen3 VSPD routing can't be configured, but DPAD routing
> - * needs to be set despite having a single option available.
> + * On Gen3 VSPD routing can't be configured, and DPAD routing
> + * is set in the group corresponding to the DPAD output (no Gen3
> + * SoC has multiple DPAD sources belonging to separate groups).
> */
> - unsigned int rgb_crtc = ffs(possible_crtcs) - 1;
> - struct rcar_du_crtc *crtc = &rcdu->crtcs[rgb_crtc];
> -
> - if (crtc->index / 2 == rgrp->index)
> - defr8 |= DEFR8_DRGBS_DU(crtc->index);
> + if (rgrp->index == rcdu->dpad0_source / 2)
> + defr8 |= DEFR8_DRGBS_DU(rcdu->dpad0_source);
> }
>
> rcar_du_group_write(rgrp, DEFR8, defr8);
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> index ed7fa3204892..bd01197700c5 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> @@ -501,6 +501,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
> struct drm_device *dev = rcdu->ddev;
> struct drm_encoder *encoder;
> struct drm_fbdev_cma *fbdev;
> + unsigned int dpad0_sources;
> unsigned int num_encoders;
> unsigned int num_groups;
> unsigned int swindex;
> @@ -613,6 +614,17 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
> encoder->possible_clones = (1 << num_encoders) - 1;
> }
>
> + /*
> + * Initialize the default DPAD0 source to the index of the first DU
> + * channel that can be connected to DPAD0. The exact value doesn't
> + * matter as it should be overwritten by mode setting for the RGB
> + * output, but it is nonetheless required to ensure a valid initial
> + * hardware configuration on Gen3 where DU0 can't always be connected to
> + * DPAD0.
> + */
> + dpad0_sources = rcdu->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs;
> + rcdu->dpad0_source = ffs(dpad0_sources) - 1;
> +
> drm_mode_config_reset(dev);
>
> drm_kms_helper_poll_init(dev);
> --
> Regards,
>
> Laurent Pinchart
>
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next prev parent reply other threads:[~2018-09-17 12:56 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-14 9:10 [PATCH v2 00/16] R-Car D3/E3 display support (with LVDS PLL) Laurent Pinchart
2018-09-14 9:10 ` [PATCH v2 01/16] dt-bindings: display: renesas: du: Document r8a77990 bindings Laurent Pinchart
2018-09-17 10:53 ` Ulrich Hecht
2018-09-14 9:10 ` [PATCH v2 02/16] dt-bindings: display: renesas: lvds: " Laurent Pinchart
2018-09-17 10:53 ` Ulrich Hecht
2018-09-24 11:36 ` Kieran Bingham
2018-09-14 9:10 ` [PATCH v2 03/16] dt-bindings: display: renesas: lvds: Add EXTAL and DU_DOTCLKIN clocks Laurent Pinchart
2018-09-17 10:53 ` Ulrich Hecht
2018-09-24 19:04 ` Kieran Bingham
2018-09-14 9:10 ` [PATCH v2 04/16] drm: bridge: thc63: Restrict modes based on hardware operating frequency Laurent Pinchart
2018-09-17 10:53 ` Ulrich Hecht
2018-09-17 12:23 ` Laurent Pinchart
2018-09-14 9:10 ` [PATCH v2 05/16] drm: rcar-du: lvds: D3/E3 support Laurent Pinchart
2018-09-17 10:53 ` Ulrich Hecht
2018-09-17 12:41 ` Laurent Pinchart
2018-09-17 12:49 ` jacopo mondi
2018-09-14 9:10 ` [PATCH v2 06/16] drm: rcar-du: Perform the initial CRTC setup from rcar_du_crtc_get() Laurent Pinchart
2018-09-17 12:50 ` jacopo mondi
2018-09-26 15:55 ` Ulrich Hecht
2018-09-28 15:14 ` Laurent Pinchart
2018-09-14 9:10 ` [PATCH v2 07/16] drm: rcar-du: Use LVDS PLL clock as dot clock when possible Laurent Pinchart
2018-09-17 12:55 ` jacopo mondi
2018-09-26 15:55 ` Ulrich Hecht
2018-11-27 0:44 ` Kuninori Morimoto
2018-12-06 9:50 ` Laurent Pinchart
2018-12-07 1:25 ` Kuninori Morimoto
2018-09-14 9:10 ` [PATCH v2 08/16] drm: rcar-du: Enable configurable DPAD0 routing on Gen3 Laurent Pinchart
2018-09-17 12:56 ` jacopo mondi [this message]
2018-09-26 15:55 ` Ulrich Hecht
2018-09-14 9:10 ` [PATCH v2 09/16] drm: rcar-du: Cache DSYSR value to ensure known initial value Laurent Pinchart
2018-09-24 11:18 ` Kieran Bingham
2018-09-26 15:55 ` Ulrich Hecht
2018-09-14 9:10 ` [PATCH v2 10/16] drm: rcar-du: Don't use TV sync mode when not supported by the hardware Laurent Pinchart
2018-09-24 11:26 ` Kieran Bingham
2018-09-26 15:55 ` Ulrich Hecht
2018-09-14 9:10 ` [PATCH v2 11/16] drm: rcar-du: Add r8a77990 and r8a77995 device support Laurent Pinchart
2018-09-24 11:41 ` Kieran Bingham
2018-09-14 9:10 ` [PATCH v2 12/16] arm64: dts: renesas: r8a77990: Add I2C device nodes Laurent Pinchart
2018-09-17 7:33 ` Simon Horman
2018-09-17 8:08 ` Laurent Pinchart
2018-09-14 9:10 ` [PATCH v2 13/16] arm64: dts: renesas: r8a77990: Add display output support Laurent Pinchart
2018-09-17 7:50 ` Simon Horman
2018-09-17 8:14 ` Simon Horman
2018-09-17 8:47 ` Laurent Pinchart
2018-09-17 8:54 ` Laurent Pinchart
2018-09-17 8:59 ` Laurent Pinchart
2018-09-19 8:35 ` Simon Horman
2018-09-19 13:11 ` Laurent Pinchart
2018-09-21 7:16 ` Simon Horman
2018-09-21 8:41 ` Laurent Pinchart
2018-09-17 8:38 ` Laurent Pinchart
2018-09-17 8:51 ` Simon Horman
2018-09-17 9:08 ` Laurent Pinchart
2018-09-17 9:48 ` Geert Uytterhoeven
2018-09-17 10:01 ` Laurent Pinchart
2018-09-14 9:10 ` [PATCH v2 14/16] arm64: dts: renesas: r8a77995: Add LVDS support Laurent Pinchart
2018-09-14 9:10 ` [PATCH v2 15/16] arm64: dts: renesas: r8a77990: ebisu: Enable VGA and HDMI outputs Laurent Pinchart
2018-09-26 15:55 ` Ulrich Hecht
2018-09-14 9:10 ` [PATCH v2 16/16] arm64: dts: renesas: r8a77995: draak: Enable HDMI display output Laurent Pinchart
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