From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>
Subject: [PATCH v10 00/23] Respin of remaining DSC + FEC patches
Date: Tue, 20 Nov 2018 10:37:13 -0800 [thread overview]
Message-ID: <20181120183736.28054-1-manasi.d.navare@intel.com> (raw)
This patch series addresses review comments from previous series posted:
https://patchwork.freedesktop.org/series/52461/
Anusha Srivatsa (4):
i915/dp/fec: Add fec_enable to the crtc state.
drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
i915/dp/fec: Configure the Forward Error Correction bits.
drm/i915/fec: Disable FEC state.
Gaurav K Singh (3):
drm/i915/dsc: Define & Compute VESA DSC params
drm/i915/dsc: Compute Rate Control parameters for DSC
drm/i915/dp: Enable/Disable DSC in DP Sink
Manasi Navare (15):
drm/dsc: Modify DRM helper to return complete DSC color depth
capabilities
drm/dsc: Define Display Stream Compression PPS infoframe
drm/dsc: Define VESA Display Stream Compression Capabilities
drm/dsc: Add helpers for DSC picture parameter set infoframes
drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
drm/i915/dp: Compute DSC pipe config in atomic check
drm/i915/dp: Do not enable PSR2 if DSC is enabled
drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
drm/i915/dp: Configure i915 Picture parameter Set registers during DSC
enabling
drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
drm/i915/dp: Configure Display stream splitter registers during DSC
enable
drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
drm/i915/dsc: Enable and disable appropriate power wells for VDSC
Srivatsa, Anusha (1):
drm/dsc: Define Rate Control values that do not change over
configurations
Documentation/gpu/drm-kms-helpers.rst | 12 +
drivers/gpu/drm/Makefile | 2 +-
drivers/gpu/drm/drm_dp_helper.c | 14 +-
drivers/gpu/drm/drm_dsc.c | 228 +++++
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 4 +
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_ddi.c | 75 +-
drivers/gpu/drm/i915/intel_display.c | 4 +-
drivers/gpu/drm/i915/intel_display.h | 3 +-
drivers/gpu/drm/i915/intel_dp.c | 233 ++++-
drivers/gpu/drm/i915/intel_drv.h | 21 +
drivers/gpu/drm/i915/intel_hdmi.c | 21 +-
drivers/gpu/drm/i915/intel_psr.c | 14 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +-
drivers/gpu/drm/i915/intel_vdsc.c | 1088 +++++++++++++++++++++++
include/drm/drm_dp_helper.h | 6 +-
include/drm/drm_dsc.h | 485 ++++++++++
18 files changed, 2179 insertions(+), 41 deletions(-)
create mode 100644 drivers/gpu/drm/drm_dsc.c
create mode 100644 drivers/gpu/drm/i915/intel_vdsc.c
create mode 100644 include/drm/drm_dsc.h
--
2.19.1
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next reply other threads:[~2018-11-20 18:37 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-20 18:37 Manasi Navare [this message]
2018-11-20 18:37 ` [PATCH v10 01/23] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities Manasi Navare
2018-11-27 13:47 ` Ville Syrjälä
2018-11-27 17:44 ` Srivatsa, Anusha
2018-11-20 18:37 ` [PATCH v10 02/23] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-20 18:37 ` [PATCH v10 03/23] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-11-20 18:37 ` [PATCH v10 04/23] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-11-20 18:37 ` [PATCH v10 05/23] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-20 18:37 ` [PATCH v10 06/23] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-11-20 18:37 ` [PATCH v10 07/23] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-11-20 18:37 ` [PATCH v10 08/23] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-11-27 13:57 ` Ville Syrjälä
2018-11-27 17:29 ` Manasi Navare
2018-11-20 18:37 ` [PATCH v10 09/23] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-11-20 18:37 ` [PATCH v10 10/23] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-11-20 18:37 ` [PATCH v10 11/23] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-11-20 18:37 ` [PATCH v10 12/23] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-11-20 18:37 ` [PATCH v10 13/23] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-11-20 18:37 ` [PATCH v10 14/23] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-11-20 18:37 ` [PATCH v10 15/23] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-11-20 18:37 ` [PATCH v10 16/23] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-11-20 18:37 ` [PATCH v10 17/23] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-11-20 18:37 ` [PATCH v10 18/23] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-11-20 18:37 ` [PATCH v10 19/23] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-11-20 18:37 ` [PATCH v10 20/23] i915/dp/fec: Add fec_enable to the crtc state Manasi Navare
2018-11-27 17:46 ` Manasi Navare
2018-11-20 18:37 ` [PATCH v10 21/23] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION Manasi Navare
2018-11-20 18:37 ` [PATCH v10 22/23] i915/dp/fec: Configure the Forward Error Correction bits Manasi Navare
2018-11-27 17:47 ` Manasi Navare
2018-11-20 18:37 ` [PATCH v10 23/23] drm/i915/fec: Disable FEC state Manasi Navare
2018-11-29 20:57 ` [PATCH v10 00/23] Respin of remaining DSC + FEC patches Manasi Navare
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