From mboxrd@z Thu Jan 1 00:00:00 1970 From: Manasi Navare Subject: [PATCH v10 17/23] drm/i915/dp: Configure Display stream splitter registers during DSC enable Date: Tue, 20 Nov 2018 10:37:30 -0800 Message-ID: <20181120183736.28054-18-manasi.d.navare@intel.com> References: <20181120183736.28054-1-manasi.d.navare@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20181120183736.28054-1-manasi.d.navare@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org RGlzcGxheSBTdHJlYW0gU3BsaXR0ZXIgcmVnaXN0ZXJzIG5lZWQgdG8gYmUgcHJvZ3JhbW1lZCB0 byBlbmFibGUKdGhlIGpvaW5lciBpZiB0d28gRFNDIGVuZ2luZXMgYXJlIHVzZWQgYW5kIGFsc28g dG8gZW5hYmxlCnRoZSBsZWZ0IGFuZCB0aGUgcmlnaHQgRFNDIGVuZ2luZXMuIFRoaXMgaGFwcGVu cyBhcyBwYXJ0IG9mCnRoZSBEU0MgZW5hYmxpbmcgcm91dGluZSBpbiB0aGUgc291cmNlIGluIGF0 b21pYyBjb21taXQuCgp2NDoKKiBSZW1vdmUgcmVkdW5kYW50IGNvbW1lbnQgKFZpbGxlKQp2MzoK KiBVc2UgY3B1X3RyYW5zY29kZXIgaW5zdGVhZCBvZiBlbmNvZGVyLT50eXBlIChWaWxsZSkKdjI6 CiogUmViYXNlIChNYW5hc2kpCgpDYzogSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGxpbnV4Lmlu dGVsLmNvbT4KQ2M6IFZpbGxlIFN5cmphbGEgPHZpbGxlLnN5cmphbGFAbGludXguaW50ZWwuY29t PgpDYzogQW51c2hhIFNyaXZhdHNhIDxhbnVzaGEuc3JpdmF0c2FAaW50ZWwuY29tPgpTaWduZWQt b2ZmLWJ5OiBNYW5hc2kgTmF2YXJlIDxtYW5hc2kuZC5uYXZhcmVAaW50ZWwuY29tPgpSZXZpZXdl ZC1ieTogQW51c2hhIFNyaXZhdHNhIDxhbnVzaGEuc3JpdmF0c2FAaW50ZWxjb20+Ci0tLQogZHJp dmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfdmRzYy5jIHwgMjEgKysrKysrKysrKysrKysrKysrKysr CiAxIGZpbGUgY2hhbmdlZCwgMjEgaW5zZXJ0aW9ucygrKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMv Z3B1L2RybS9pOTE1L2ludGVsX3Zkc2MuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3Zk c2MuYwppbmRleCAyY2M5MzNiNTdkOTQuLmMyNTM0MTQyMTY3ZiAxMDA2NDQKLS0tIGEvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaW50ZWxfdmRzYy5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2lu dGVsX3Zkc2MuYwpAQCAtOTk4LDYgKzk5OCwxMiBAQCBzdGF0aWMgdm9pZCBpbnRlbF9kcF93cml0 ZV9kc2NfcHBzX3NkcChzdHJ1Y3QgaW50ZWxfZW5jb2RlciAqZW5jb2RlciwKIHZvaWQgaW50ZWxf ZHNjX2VuYWJsZShzdHJ1Y3QgaW50ZWxfZW5jb2RlciAqZW5jb2RlciwKIAkJICAgICAgY29uc3Qg c3RydWN0IGludGVsX2NydGNfc3RhdGUgKmNydGNfc3RhdGUpCiB7CisJc3RydWN0IGludGVsX2Ny dGMgKmNydGMgPSB0b19pbnRlbF9jcnRjKGNydGNfc3RhdGUtPmJhc2UuY3J0Yyk7CisJc3RydWN0 IGRybV9pOTE1X3ByaXZhdGUgKmRldl9wcml2ID0gdG9faTkxNShlbmNvZGVyLT5iYXNlLmRldik7 CisJZW51bSBwaXBlIHBpcGUgPSBjcnRjLT5waXBlOworCWk5MTVfcmVnX3QgZHNzX2N0bDFfcmVn LCBkc3NfY3RsMl9yZWc7CisJdTMyIGRzc19jdGwxX3ZhbCA9IDA7CisJdTMyIGRzc19jdGwyX3Zh bCA9IDA7CiAKIAlpZiAoIWNydGNfc3RhdGUtPmRzY19wYXJhbXMuY29tcHJlc3Npb25fZW5hYmxl KQogCQlyZXR1cm47CkBAIC0xMDA2LDUgKzEwMTIsMjAgQEAgdm9pZCBpbnRlbF9kc2NfZW5hYmxl KHN0cnVjdCBpbnRlbF9lbmNvZGVyICplbmNvZGVyLAogCiAJaW50ZWxfZHBfd3JpdGVfZHNjX3Bw c19zZHAoZW5jb2RlciwgY3J0Y19zdGF0ZSk7CiAKKwlpZiAoY3J0Y19zdGF0ZS0+Y3B1X3RyYW5z Y29kZXIgPT0gVFJBTlNDT0RFUl9FRFApIHsKKwkJZHNzX2N0bDFfcmVnID0gRFNTX0NUTDE7CisJ CWRzc19jdGwyX3JlZyA9IERTU19DVEwyOworCX0gZWxzZSB7CisJCWRzc19jdGwxX3JlZyA9IElD TF9QSVBFX0RTU19DVEwxKHBpcGUpOworCQlkc3NfY3RsMl9yZWcgPSBJQ0xfUElQRV9EU1NfQ1RM MihwaXBlKTsKKwl9CisJZHNzX2N0bDJfdmFsIHw9IExFRlRfQlJBTkNIX1ZEU0NfRU5BQkxFOwor CWlmIChjcnRjX3N0YXRlLT5kc2NfcGFyYW1zLmRzY19zcGxpdCkgeworCQlkc3NfY3RsMl92YWwg fD0gUklHSFRfQlJBTkNIX1ZEU0NfRU5BQkxFOworCQlkc3NfY3RsMV92YWwgfD0gSk9JTkVSX0VO QUJMRTsKKwl9CisJSTkxNV9XUklURShkc3NfY3RsMV9yZWcsIGRzc19jdGwxX3ZhbCk7CisJSTkx NV9XUklURShkc3NfY3RsMl9yZWcsIGRzc19jdGwyX3ZhbCk7CisKIAlyZXR1cm47CiB9Ci0tIAoy LjE5LjEKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCklu dGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRw czovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=