From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/9] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2
Date: Wed, 28 Nov 2018 11:02:18 -0800 [thread overview]
Message-ID: <20181128190218.GI5161@intel.com> (raw)
In-Reply-To: <20181127003710.18618-2-jose.souza@intel.com>
On Mon, Nov 26, 2018 at 04:37:03PM -0800, José Roberto de Souza wrote:
> For PSR2 there is no register to tell HW to keep main link enabled
> while PSR2 is active, so don't configure sink DPCD with a
> misleading value.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/intel_psr.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index f5d27a02eb28..888e348cc1b4 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -391,12 +391,14 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
> drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
> DP_ALPM_ENABLE);
> dpcd_val |= DP_PSR_ENABLE_PSR2;
> + } else {
> + if (dev_priv->psr.link_standby)
> + dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
> +
> + if (INTEL_GEN(dev_priv) >= 8)
> + dpcd_val |= DP_PSR_CRC_VERIFICATION;
commit message only mention the link stand-by...
could you please do this in a separated patch?
> }
>
> - if (dev_priv->psr.link_standby)
> - dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
> - if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
> - dpcd_val |= DP_PSR_CRC_VERIFICATION;
> drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
>
> drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
> --
> 2.19.2
>
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next prev parent reply other threads:[~2018-11-28 19:02 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-27 0:37 [PATCH 1/9] drm/i915: Disable PSR in Apple panels José Roberto de Souza
2018-11-27 0:37 ` [PATCH 2/9] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2 José Roberto de Souza
2018-11-28 19:02 ` Rodrigo Vivi [this message]
2018-11-28 20:13 ` Souza, Jose
2018-11-30 1:09 ` Rodrigo Vivi
2018-11-27 0:37 ` [PATCH 3/9] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch José Roberto de Souza
2018-11-29 22:04 ` Rodrigo Vivi
2018-11-29 23:37 ` Dhinakaran Pandiyan
2018-11-27 0:37 ` [PATCH 4/9] drm/i915/icl: Do not change reserved registers related to PSR2 José Roberto de Souza
2018-11-29 22:15 ` Rodrigo Vivi
2018-11-29 23:46 ` Souza, Jose
2018-11-30 21:21 ` Runyan, Arthur J
2018-11-27 0:37 ` [PATCH 5/9] drm: Add offset of PSR2 SU X granularity value José Roberto de Souza
2018-11-29 22:16 ` Rodrigo Vivi
2018-11-27 0:37 ` [PATCH 6/9] drm/i915/psr: Check if source supports sink specific SU granularity José Roberto de Souza
2018-11-29 23:03 ` Rodrigo Vivi
2018-11-30 0:00 ` Souza, Jose
2018-11-27 0:37 ` [PATCH 7/9] drm/i915/psr: Rename PSR2 macros to better match meaning José Roberto de Souza
2018-11-29 23:07 ` Rodrigo Vivi
2018-11-29 23:25 ` Dhinakaran Pandiyan
2018-11-30 0:17 ` Souza, Jose
2018-11-27 0:37 ` [PATCH 8/9] drm/i915/psr: Set the right frames values José Roberto de Souza
2018-11-29 23:10 ` Rodrigo Vivi
2018-11-30 0:48 ` Souza, Jose
2018-11-27 0:37 ` [PATCH 9/9] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking José Roberto de Souza
2018-11-29 23:11 ` Rodrigo Vivi
2018-11-29 23:26 ` Dhinakaran Pandiyan
2018-11-27 13:38 ` [PATCH 1/9] drm/i915: Disable PSR in Apple panels Ville Syrjälä
2018-11-27 21:55 ` Souza, Jose
2018-11-29 23:44 ` Dhinakaran Pandiyan
2018-11-27 14:11 ` kbuild test robot
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