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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Kevin Strasser <kevin.strasser@intel.com>
Cc: David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	Tina Zhang <tina.zhang@intel.com>,
	Uma Shankar <uma.shankar@intel.com>
Subject: Re: [PATCH 1/3] drm/fourcc: Add 64 bpp half float formats
Date: Thu, 29 Nov 2018 20:42:46 +0200	[thread overview]
Message-ID: <20181129184246.GN9144@intel.com> (raw)
In-Reply-To: <1543473493-30973-2-git-send-email-kevin.strasser@intel.com>

On Wed, Nov 28, 2018 at 10:38:11PM -0800, Kevin Strasser wrote:
> Add 64 bpp 16:16:16:16 half float pixel formats. Each 16 bit component is
> formatted in IEEE-754 half-precision float (binary16) 1:5:10
> MSb-sign:exponent:fraction form.
> 
> An 'is_fp' attribute is added to drm_format_info so that drivers can easily
> distinguish these formats from those that might contain uint pixel data.
> 
> This patch attempts to address the feedback provided when 2 of these
> formats were previosly proposed:
>   https://patchwork.kernel.org/patch/10072545/
> 
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> Cc: Tina Zhang <tina.zhang@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: dri-devel@lists.freedesktop.org
> ---
>  drivers/gpu/drm/drm_fourcc.c  | 4 ++++
>  include/drm/drm_fourcc.h      | 3 +++
>  include/uapi/drm/drm_fourcc.h | 6 ++++++
>  3 files changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index f523948..a7b969a 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -198,6 +198,10 @@ const struct drm_format_info *__drm_format_info(u32 format)
>  		{ .format = DRM_FORMAT_ABGR8888,	.depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
>  		{ .format = DRM_FORMAT_RGBA8888,	.depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
>  		{ .format = DRM_FORMAT_BGRA8888,	.depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
> +		{ .format = DRM_FORMAT_XRGB16161616H,	.depth = 48, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_fp = true },
> +		{ .format = DRM_FORMAT_XBGR16161616H,	.depth = 48, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_fp = true },
> +		{ .format = DRM_FORMAT_ARGB16161616H,	.depth = 64, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_fp = true },
> +		{ .format = DRM_FORMAT_ABGR16161616H,	.depth = 64, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_fp = true },

cpp is wrong for all of these.

>  		{ .format = DRM_FORMAT_RGB888_A8,	.depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
>  		{ .format = DRM_FORMAT_BGR888_A8,	.depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
>  		{ .format = DRM_FORMAT_XRGB8888_A8,	.depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
> diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
> index bcb389f..2c5aa19 100644
> --- a/include/drm/drm_fourcc.h
> +++ b/include/drm/drm_fourcc.h
> @@ -133,6 +133,9 @@ struct drm_format_info {
>  
>  	/** @is_yuv: Is it a YUV format? */
>  	bool is_yuv;
> +
> +	/** @is_fp: Is it a floating point format? */
> +	bool is_fp;
>  };
>  
>  /**
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index e7e48f1f..530bce4 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -144,6 +144,12 @@ extern "C" {
>  #define DRM_FORMAT_RGBA1010102	fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
>  #define DRM_FORMAT_BGRA1010102	fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
>  
> +/* 64 bpp RGB IEEE-754 half-precision float (binary16) */

Might as well document the bits:
 * [15:0] sign:exponent:mantissa 1:5:10

> +#define DRM_FORMAT_XBGR16161616H fourcc_code('X', 'B', '4', 'H') /* [63:0] x:B:G:R 16:16:16:16 little endian */
> +#define DRM_FORMAT_ABGR16161616H fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */
> +#define DRM_FORMAT_XRGB16161616H fourcc_code('X', 'R', '4', 'H') /* [63:0] x:R:G:B 16:16:16:16 little endian */
> +#define DRM_FORMAT_ARGB16161616H fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */

ocd: the other formats have separate groups for X vs. A separate.
And RGB before BGR.

> +
>  /* packed YCbCr */
>  #define DRM_FORMAT_YUYV		fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
>  #define DRM_FORMAT_YVYU		fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2018-11-29 18:42 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-29  6:38 [PATCH 0/3] Support 64 bpp half float formats Kevin Strasser
2018-11-29  6:38 ` [PATCH 1/3] drm/fourcc: Add " Kevin Strasser
2018-11-29 18:42   ` Ville Syrjälä [this message]
2018-11-29 21:38     ` Strasser, Kevin
2018-11-29  6:38 ` [PATCH 2/3] drm: Add optional PIXEL_NORMALIZE_RANGE property to drm_plane Kevin Strasser
2018-11-29 18:45   ` Ville Syrjälä
2018-11-29 21:38     ` Strasser, Kevin
2018-11-29  6:38 ` [PATCH 3/3] drm/i915: Implement half float formats and pixel normalize property Kevin Strasser
2018-11-29  9:18   ` Daniel Vetter
2018-11-29 17:52     ` Strasser, Kevin
2018-11-30  9:42       ` Daniel Vetter
2018-11-29 18:52   ` Ville Syrjälä
2018-11-29 21:39     ` Strasser, Kevin
2018-11-29 19:26 ` [Intel-gfx] [PATCH 0/3] Support 64 bpp half float formats Ville Syrjälä
2018-11-29 21:39   ` Strasser, Kevin
2018-11-30 14:15     ` Ville Syrjälä

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