From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v5 17/17] arm64: dts: allwinner: a64: Add DSI pipeline Date: Tue, 11 Dec 2018 17:34:15 +0100 Message-ID: <20181211163415.74sen2drjol5j7iu@flea> References: <20181210161729.29720-1-jagan@amarulasolutions.com> <20181210161729.29720-18-jagan@amarulasolutions.com> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="3gj7e5tiwlqkg6xk" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20181210161729.29720-18-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Jagan Teki Cc: Chen-Yu Tsai , Michael Turquette , Stephen Boyd , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Michael Trimarchi , linux-sunxi , linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org List-Id: dri-devel@lists.freedesktop.org --3gj7e5tiwlqkg6xk Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Mon, Dec 10, 2018 at 09:47:29PM +0530, Jagan Teki wrote: > The A64 has a MIPI-DSI block which is similar to A31 > without mod clock. > > So, add dsi node with A64 compatible, dphy node with > A31 compatible and finally connect dsi to tcon0 to > make proper DSI pipeline. > > Signed-off-by: Jagan Teki > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index dd5740bc3fc9..dd5c7ad55149 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -344,6 +344,12 @@ > #address-cells = <1>; > #size-cells = <0>; > reg = <1>; > + > + tcon0_out_dsi: endpoint@1 { > + reg = <1>; > + remote-endpoint = <&dsi_in_tcon0>; > + allwinner,tcon-channel = <1>; > + }; > }; > }; > }; > @@ -910,6 +916,45 @@ > status = "disabled"; > }; > > + dsi: dsi@1ca0000 { > + compatible = "allwinner,sun50i-a64-mipi-dsi"; > + reg = <0x01ca0000 0x1000>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_MIPI_DSI>; > + clock-names = "bus"; > + resets = <&ccu RST_BUS_MIPI_DSI>; > + phys = <&dphy>; > + phy-names = "dphy"; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0>; > + > + dsi_in_tcon0: endpoint { > + remote-endpoint = <&tcon0_out_dsi>; > + }; The reg address-cells and size-cells properties will generate DTC warnings when compiled with W=1, please fix them. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --3gj7e5tiwlqkg6xk--