Re: [Intel-gfx] [PATCH 12/15] drm/i915/tv: Add 1080p30/50/60 TV modes

[Imre Deak <imre.deak@intel.com>]

On Mon, Nov 12, 2018 at 06:59:57PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add the missing 1080p TV modes. On gen4 all of them work just fine,
> whereas on gen3 only the 30Hz mode actually works correctly.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Matches the spec:
Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_tv.c | 90 +++++++++++++++++++++++++++++++--
>  1 file changed, 86 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
> index c39e9a5b43db..216525dd144a 100644
> --- a/drivers/gpu/drm/i915/intel_tv.c
> +++ b/drivers/gpu/drm/i915/intel_tv.c
> @@ -783,6 +783,84 @@ static const struct tv_mode tv_modes[] = {
>  
>  		.filter_table = filter_table,
>  	},
> +
> +	{
> +		.name       = "1080p@30Hz",
> +		.clock		= 148500,
> +		.refresh	= 30000,
> +		.oversample     = 2,
> +		.component_only = true,
> +
> +		.hsync_end      = 88,               .hblank_end         = 235,
> +		.hblank_start   = 2155,             .htotal             = 2199,
> +
> +		.progressive	= true,		    .trilevel_sync = true,
> +
> +		.vsync_start_f1 = 8,               .vsync_start_f2     = 8,
> +		.vsync_len      = 10,
> +
> +		.veq_ena	= false,	.veq_start_f1	= 0,
> +		.veq_start_f2	= 0,		    .veq_len		= 0,
> +
> +		.vi_end_f1      = 44,               .vi_end_f2          = 44,
> +		.nbr_end        = 1079,
> +
> +		.burst_ena      = false,
> +
> +		.filter_table = filter_table,
> +	},
> +
> +	{
> +		.name       = "1080p@50Hz",
> +		.clock		= 148500,
> +		.refresh	= 50000,
> +		.oversample     = 1,
> +		.component_only = true,
> +
> +		.hsync_end      = 88,               .hblank_end         = 235,
> +		.hblank_start   = 2155,             .htotal             = 2639,
> +
> +		.progressive	= true,		    .trilevel_sync = true,
> +
> +		.vsync_start_f1 = 8,               .vsync_start_f2     = 8,
> +		.vsync_len      = 10,
> +
> +		.veq_ena	= false,	.veq_start_f1	= 0,
> +		.veq_start_f2	= 0,		    .veq_len		= 0,
> +
> +		.vi_end_f1      = 44,               .vi_end_f2          = 44,
> +		.nbr_end        = 1079,
> +
> +		.burst_ena      = false,
> +
> +		.filter_table = filter_table,
> +	},
> +
> +	{
> +		.name       = "1080p@60Hz",
> +		.clock		= 148500,
> +		.refresh	= 60000,
> +		.oversample     = 1,
> +		.component_only = true,
> +
> +		.hsync_end      = 88,               .hblank_end         = 235,
> +		.hblank_start   = 2155,             .htotal             = 2199,
> +
> +		.progressive	= true,		    .trilevel_sync = true,
> +
> +		.vsync_start_f1 = 8,               .vsync_start_f2     = 8,
> +		.vsync_len      = 10,
> +
> +		.veq_ena	= false,		    .veq_start_f1	= 0,
> +		.veq_start_f2	= 0,		    .veq_len		= 0,
> +
> +		.vi_end_f1      = 44,               .vi_end_f2          = 44,
> +		.nbr_end        = 1079,
> +
> +		.burst_ena      = false,
> +
> +		.filter_table = filter_table,
> +	},
>  };
>  
>  static struct intel_tv *enc_to_tv(struct intel_encoder *encoder)
> @@ -1538,11 +1616,15 @@ intel_tv_init(struct drm_i915_private *dev_priv)
>  	connector->doublescan_allowed = false;
>  
>  	/* Create TV properties then attach current values */
> -	for (i = 0; i < ARRAY_SIZE(tv_modes); i++)
> +	for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
> +		/* 1080p50/1080p60 not supported on gen3 */
> +		if (IS_GEN3(dev_priv) &&
> +		    tv_modes[i].oversample == 1)
> +			break;
> +
>  		tv_format_names[i] = tv_modes[i].name;
> -	drm_mode_create_tv_properties(dev,
> -				      ARRAY_SIZE(tv_modes),
> -				      tv_format_names);
> +	}
> +	drm_mode_create_tv_properties(dev, i, tv_format_names);
>  
>  	drm_object_attach_property(&connector->base, dev->mode_config.tv_mode_property,
>  				   state->tv.mode);
> -- 
> 2.18.1
> 
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