dri-devel Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Alex Deucher <alexander.deucher@amd.com>,
	Sasha Levin <sashal@kernel.org>,
	dri-devel@lists.freedesktop.org, Eric Yang <Eric.Yang2@amd.com>,
	amd-gfx@lists.freedesktop.org
Subject: [PATCH AUTOSEL 4.19 185/258] drm/amd/display: fix YCbCr420 blank color
Date: Mon, 28 Jan 2019 10:58:11 -0500	[thread overview]
Message-ID: <20190128155924.51521-185-sashal@kernel.org> (raw)
In-Reply-To: <20190128155924.51521-1-sashal@kernel.org>

From: Eric Yang <Eric.Yang2@amd.com>

[ Upstream commit 12750d1647f118496f1da727146f255f5e44d500 ]

[Why]
YCbCr420 packing format uses two chanels for luma, and 1
channel for both chroma component. Our previous implementation
did not account for this and results in every other pixel having
very high luma value, showing greyish color instead of black.

YCbCr444 = <Y1, Cb1, Cr1>; <Y2, Cb2, Cr2> .....
YCbCr420 = <Y1, Y2,  Cb1>; <Y3, Y4,  Cr1> .....

[How]
Program the second channel with the black color value for luma
as well.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Hugo Hu <Hugo.Hu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 .../drm/amd/display/dc/dce110/dce110_hw_sequencer.c   | 11 ++++++++++-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c |  9 +++++++++
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 0941f3c689bc..580e7e82034f 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1268,10 +1268,19 @@ static void program_scaler(const struct dc *dc,
 		pipe_ctx->plane_res.scl_data.lb_params.depth,
 		&pipe_ctx->stream->bit_depth_params);
 
-	if (pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color)
+	if (pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color) {
+		/*
+		 * The way 420 is packed, 2 channels carry Y component, 1 channel
+		 * alternate between Cb and Cr, so both channels need the pixel
+		 * value for Y
+		 */
+		if (pipe_ctx->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)
+			color.color_r_cr = color.color_g_y;
+
 		pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color(
 				pipe_ctx->stream_res.tg,
 				&color);
+	}
 
 	pipe_ctx->plane_res.xfm->funcs->transform_set_scaler(pipe_ctx->plane_res.xfm,
 		&pipe_ctx->plane_res.scl_data);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 33a9d0c58966..4058b59d9bea 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2121,6 +2121,15 @@ static void dcn10_blank_pixel_data(
 	color_space = stream->output_color_space;
 	color_space_to_black_color(dc, color_space, &black_color);
 
+	/*
+	 * The way 420 is packed, 2 channels carry Y component, 1 channel
+	 * alternate between Cb and Cr, so both channels need the pixel
+	 * value for Y
+	 */
+	if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)
+		black_color.color_r_cr = black_color.color_g_y;
+
+
 	if (stream_res->tg->funcs->set_blank_color)
 		stream_res->tg->funcs->set_blank_color(
 				stream_res->tg,
-- 
2.19.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2019-01-28 15:58 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-28 15:55 [PATCH AUTOSEL 4.19 001/258] drm/bufs: Fix Spectre v1 vulnerability Sasha Levin
2019-01-28 15:55 ` [PATCH AUTOSEL 4.19 003/258] drm/vgem: Fix vgem_init to get drm device available Sasha Levin
2019-01-28 15:55 ` [PATCH AUTOSEL 4.19 007/258] drm/sun4i: Initialize registers in tcon-top driver Sasha Levin
2019-01-28 15:55 ` [PATCH AUTOSEL 4.19 009/258] gpu: ipu-v3: image-convert: Prevent race between run and unprepare Sasha Levin
2019-01-28 15:55 ` [PATCH AUTOSEL 4.19 027/258] drm/vc4: ->x_scaling[1] should never be set to VC4_SCALING_NONE Sasha Levin
2019-01-28 15:55 ` [PATCH AUTOSEL 4.19 046/258] drm/rockchip: fix for mailbox read size Sasha Levin
2019-01-28 15:55 ` [PATCH AUTOSEL 4.19 048/258] drm/amd/display: fix gamma not being applied correctly Sasha Levin
2019-01-28 15:55 ` [PATCH AUTOSEL 4.19 049/258] drm/amd/display: calculate stream->phy_pix_clk before clock mapping Sasha Levin
2019-01-28 15:56 ` [PATCH AUTOSEL 4.19 082/258] drm: Clear state->acquire_ctx before leaving drm_atomic_helper_commit_duplicated_state() Sasha Levin
2019-01-28 15:56 ` [PATCH AUTOSEL 4.19 083/258] drm: Move drm_mode_setcrtc() local re-init to failure path Sasha Levin
2019-01-28 21:03   ` Sean Paul
2019-02-02 17:32     ` Sasha Levin
2019-01-28 15:56 ` [PATCH AUTOSEL 4.19 092/258] drm/v3d: Fix prime imports of buffers from other drivers Sasha Levin
2019-01-28 15:56 ` [PATCH AUTOSEL 4.19 109/258] drm/amdgpu/powerplay: fix clock stretcher limits on polaris (v2) Sasha Levin
     [not found] ` <20190128155924.51521-1-sashal-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2019-01-28 15:57   ` [PATCH AUTOSEL 4.19 137/258] drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driver Sasha Levin
2019-01-28 15:57   ` [PATCH AUTOSEL 4.19 138/258] drm/msm: dpu: Only check flush register against pending flushes Sasha Levin
2019-01-28 15:58   ` [PATCH AUTOSEL 4.19 203/258] drm/amd/display: validate extended dongle caps Sasha Levin
2019-01-28 15:58 ` [PATCH AUTOSEL 4.19 183/258] drm/amd/display: Add retry to read ddc_clock pin Sasha Levin
2019-01-28 15:58 ` Sasha Levin [this message]
2019-01-28 15:58 ` [PATCH AUTOSEL 4.19 204/258] video: clps711x-fb: release disp device node in probe() Sasha Levin
2019-01-28 15:58 ` [PATCH AUTOSEL 4.19 206/258] fbdev: fbmem: behave better with small rotated displays and many CPUs Sasha Levin
2019-01-28 15:58 ` [PATCH AUTOSEL 4.19 211/258] fbdev: fbcon: Fix unregister crash when more than one framebuffer Sasha Levin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190128155924.51521-185-sashal@kernel.org \
    --to=sashal@kernel.org \
    --cc=Eric.Yang2@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=stable@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox