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From: kholk11-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
To: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
	freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
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	georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
Subject: [PATCH v3 3/7] drm/msm/mdp5: Add configuration for msm8x76
Date: Tue, 15 Oct 2019 12:10:54 +0200	[thread overview]
Message-ID: <20191015101058.37157-4-kholk11@gmail.com> (raw)
In-Reply-To: <20191015101058.37157-1-kholk11-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: AngeloGioacchino Del Regno <kholk11@gmail.com>

Add the configuration entries for the MDP5 v1.11, found on
MSM8956, MSM8976 and APQ variants.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
---
 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 98 ++++++++++++++++++++++++
 1 file changed, 98 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
index 7c9c1ddae821..1f48f64539a2 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
@@ -545,6 +545,103 @@ static const struct mdp5_cfg_hw msm8x96_config = {
 	.max_clk = 412500000,
 };
 
+const struct mdp5_cfg_hw msm8x76_config = {
+	.name = "msm8x76",
+	.mdp = {
+		.count = 1,
+		.caps = MDP_CAP_SMP |
+			MDP_CAP_DSC |
+			MDP_CAP_SRC_SPLIT |
+			0,
+	},
+	.ctl = {
+		.count = 3,
+		.base = { 0x01000, 0x01200, 0x01400 },
+		.flush_hw_mask = 0xffffffff,
+	},
+	.smp = {
+		.mmb_count = 10,
+		.mmb_size = 10240,
+		.clients = {
+			[SSPP_VIG0] = 1, [SSPP_VIG1] = 9,
+			[SSPP_DMA0] = 4,
+			[SSPP_RGB0] = 7, [SSPP_RGB1] = 8,
+		},
+	},
+	.pipe_vig = {
+		.count = 2,
+		.base = { 0x04000, 0x06000 },
+		.caps = MDP_PIPE_CAP_HFLIP	|
+			MDP_PIPE_CAP_VFLIP	|
+			MDP_PIPE_CAP_SCALE	|
+			MDP_PIPE_CAP_CSC	|
+			MDP_PIPE_CAP_DECIMATION	|
+			MDP_PIPE_CAP_SW_PIX_EXT	|
+			0,
+	},
+	.pipe_rgb = {
+		.count = 2,
+		.base = { 0x14000, 0x16000 },
+		.caps = MDP_PIPE_CAP_HFLIP	|
+			MDP_PIPE_CAP_VFLIP	|
+			MDP_PIPE_CAP_DECIMATION	|
+			MDP_PIPE_CAP_SW_PIX_EXT	|
+			0,
+	},
+	.pipe_dma = {
+		.count = 1,
+		.base = { 0x24000 },
+		.caps = MDP_PIPE_CAP_HFLIP	|
+			MDP_PIPE_CAP_VFLIP	|
+			MDP_PIPE_CAP_SW_PIX_EXT	|
+			0,
+	},
+	.pipe_cursor = {
+		.count = 1,
+		.base = { 0x440DC },
+		.caps = MDP_PIPE_CAP_HFLIP	|
+			MDP_PIPE_CAP_VFLIP	|
+			MDP_PIPE_CAP_SW_PIX_EXT	|
+			MDP_PIPE_CAP_CURSOR	|
+			0,
+	},
+	.lm = {
+		.count = 2,
+		.base = { 0x44000, 0x45000 },
+		.instances = {
+				{ .id = 0, .pp = 0, .dspp = 0,
+				  .caps = MDP_LM_CAP_DISPLAY, },
+				{ .id = 1, .pp = -1, .dspp = -1,
+				  .caps = MDP_LM_CAP_WB },
+			     },
+		.nb_stages = 8,
+		.max_width = 2560,
+		.max_height = 0xFFFF,
+	},
+	.dspp = {
+		.count = 1,
+		.base = { 0x54000 },
+
+	},
+	.pp = {
+		.count = 3,
+		.base = { 0x70000, 0x70800, 0x72000 },
+	},
+	.dsc = {
+		.count = 2,
+		.base = { 0x80000, 0x80400 },
+	},
+	.intf = {
+		.base = { 0x6a000, 0x6a800, 0x6b000 },
+		.connect = {
+			[0] = INTF_DISABLED,
+			[1] = INTF_DSI,
+			[2] = INTF_DSI,
+		},
+	},
+	.max_clk = 360000000,
+};
+
 static const struct mdp5_cfg_hw msm8917_config = {
 	.name = "msm8917",
 	.mdp = {
@@ -745,6 +842,7 @@ static const struct mdp5_cfg_handler cfg_handlers_v1[] = {
 	{ .revision = 6, .config = { .hw = &msm8x16_config } },
 	{ .revision = 9, .config = { .hw = &msm8x94_config } },
 	{ .revision = 7, .config = { .hw = &msm8x96_config } },
+	{ .revision = 11, .config = { .hw = &msm8x76_config } },
 	{ .revision = 15, .config = { .hw = &msm8917_config } },
 };
 
-- 
2.21.0

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  parent reply	other threads:[~2019-10-15 10:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-15 10:10 [PATCH v3 0/7] DRM/MSM: Add support for MSM8956 and Adreno 510 kholk11-Re5JQEeQqe8AvxtiuMwx3w
     [not found] ` <20191015101058.37157-1-kholk11-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-10-15 10:10   ` [PATCH v3 1/7] drm/msm/mdp5: Add optional TBU and TBU_RT clocks kholk11-Re5JQEeQqe8AvxtiuMwx3w
2019-10-15 10:10   ` [PATCH v3 2/7] dt-bindings: msm/mdp5: Document " kholk11-Re5JQEeQqe8AvxtiuMwx3w
2019-10-15 10:10   ` kholk11-Re5JQEeQqe8AvxtiuMwx3w [this message]
2019-10-15 10:10   ` [PATCH v3 4/7] drm/msm/dsi: Add configuration for 28nm PLL on family B kholk11-Re5JQEeQqe8AvxtiuMwx3w
2019-10-15 10:10   ` [PATCH v3 5/7] dt-bindings: msm/dsi: Add 28nm PLL for family B compatible kholk11-Re5JQEeQqe8AvxtiuMwx3w
2019-10-15 10:10   ` [PATCH v3 6/7] drm/msm/dsi: Add configuration for 8x76 kholk11-Re5JQEeQqe8AvxtiuMwx3w
2019-10-15 10:10   ` [PATCH v3 7/7] drm/msm/adreno: Add support for Adreno 510 GPU kholk11-Re5JQEeQqe8AvxtiuMwx3w

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