From: Daniel Vetter <daniel@ffwll.ch>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v3 12/13] drm/rockchip: Avoid drm_dp_link helpers
Date: Tue, 22 Oct 2019 16:01:59 +0200 [thread overview]
Message-ID: <20191022140159.GN11828@phenom.ffwll.local> (raw)
In-Reply-To: <20191021143437.1477719-13-thierry.reding@gmail.com>
On Mon, Oct 21, 2019 at 04:34:36PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> During the discussion of patches that enhance the drm_dp_link helpers it
> was concluded that these helpers aren't very useful to begin with. Start
> pushing the equivalent code into individual drivers to ultimately remove
> them.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> drivers/gpu/drm/rockchip/cdn-dp-core.c | 12 ++++++------
> drivers/gpu/drm/rockchip/cdn-dp-core.h | 3 ++-
> drivers/gpu/drm/rockchip/cdn-dp-reg.c | 19 +++++++++----------
> 3 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
> index d505ea7d5384..eed594bd38d3 100644
> --- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
> +++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
> @@ -477,8 +477,8 @@ static int cdn_dp_disable(struct cdn_dp_device *dp)
> cdn_dp_set_firmware_active(dp, false);
> cdn_dp_clk_disable(dp);
> dp->active = false;
> - dp->link.rate = 0;
> - dp->link.num_lanes = 0;
> + dp->max_lanes = 0;
> + dp->max_rate = 0;
> if (!dp->connected) {
> kfree(dp->edid);
> dp->edid = NULL;
> @@ -570,7 +570,7 @@ static bool cdn_dp_check_link_status(struct cdn_dp_device *dp)
> struct cdn_dp_port *port = cdn_dp_connected_port(dp);
> u8 sink_lanes = drm_dp_max_lane_count(dp->dpcd);
>
> - if (!port || !dp->link.rate || !dp->link.num_lanes)
> + if (!port || !dp->max_rate || !dp->max_lanes)
> return false;
>
> if (cdn_dp_dpcd_read(dp, DP_LANE0_1_STATUS, link_status,
> @@ -952,8 +952,8 @@ static void cdn_dp_pd_event_work(struct work_struct *work)
>
> /* Enabled and connected with a sink, re-train if requested */
> } else if (!cdn_dp_check_link_status(dp)) {
> - unsigned int rate = dp->link.rate;
> - unsigned int lanes = dp->link.num_lanes;
> + unsigned int rate = dp->max_rate;
> + unsigned int lanes = dp->max_lanes;
> struct drm_display_mode *mode = &dp->mode;
>
> DRM_DEV_INFO(dp->dev, "Connected with sink. Re-train link\n");
> @@ -966,7 +966,7 @@ static void cdn_dp_pd_event_work(struct work_struct *work)
>
> /* If training result is changed, update the video config */
> if (mode->clock &&
> - (rate != dp->link.rate || lanes != dp->link.num_lanes)) {
> + (rate != dp->max_rate || lanes != dp->max_lanes)) {
> ret = cdn_dp_config_video(dp);
> if (ret) {
> dp->connected = false;
> diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h
> index b85ea89eb60b..83c4586665b4 100644
> --- a/drivers/gpu/drm/rockchip/cdn-dp-core.h
> +++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h
> @@ -92,9 +92,10 @@ struct cdn_dp_device {
> struct reset_control *core_rst;
> struct audio_info audio_info;
> struct video_info video_info;
> - struct drm_dp_link link;
> struct cdn_dp_port *port[MAX_PHY];
> u8 ports;
> + u8 max_lanes;
> + u8 max_rate;
> u8 lanes;
> int active_port;
>
> diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
> index 077c87021908..7361c07cb4a7 100644
> --- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
> +++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
> @@ -535,8 +535,8 @@ static int cdn_dp_get_training_status(struct cdn_dp_device *dp)
> if (ret)
> goto err_get_training_status;
>
> - dp->link.rate = drm_dp_bw_code_to_link_rate(status[0]);
> - dp->link.num_lanes = status[1];
> + dp->max_rate = drm_dp_bw_code_to_link_rate(status[0]);
> + dp->max_lanes = status[1];
>
> err_get_training_status:
> if (ret)
> @@ -560,8 +560,8 @@ int cdn_dp_train_link(struct cdn_dp_device *dp)
> return ret;
> }
>
> - DRM_DEV_DEBUG_KMS(dp->dev, "rate:0x%x, lanes:%d\n", dp->link.rate,
> - dp->link.num_lanes);
> + DRM_DEV_DEBUG_KMS(dp->dev, "rate:0x%x, lanes:%d\n", dp->max_rate,
> + dp->max_lanes);
> return ret;
> }
>
> @@ -639,7 +639,7 @@ int cdn_dp_config_video(struct cdn_dp_device *dp)
> bit_per_pix = (video->color_fmt == YCBCR_4_2_2) ?
> (video->color_depth * 2) : (video->color_depth * 3);
>
> - link_rate = dp->link.rate / 1000;
> + link_rate = dp->max_rate / 1000;
>
> ret = cdn_dp_reg_write(dp, BND_HSYNC2VSYNC, VIF_BYPASS_INTERLACE);
> if (ret)
> @@ -659,14 +659,13 @@ int cdn_dp_config_video(struct cdn_dp_device *dp)
> do {
> tu_size_reg += 2;
> symbol = tu_size_reg * mode->clock * bit_per_pix;
> - do_div(symbol, dp->link.num_lanes * link_rate * 8);
> + do_div(symbol, dp->max_lanes * link_rate * 8);
> rem = do_div(symbol, 1000);
> if (tu_size_reg > 64) {
> ret = -EINVAL;
> DRM_DEV_ERROR(dp->dev,
> "tu error, clk:%d, lanes:%d, rate:%d\n",
> - mode->clock, dp->link.num_lanes,
> - link_rate);
> + mode->clock, dp->max_lanes, link_rate);
> goto err_config_video;
> }
> } while ((symbol <= 1) || (tu_size_reg - symbol < 4) ||
> @@ -680,7 +679,7 @@ int cdn_dp_config_video(struct cdn_dp_device *dp)
>
> /* set the FIFO Buffer size */
> val = div_u64(mode->clock * (symbol + 1), 1000) + link_rate;
> - val /= (dp->link.num_lanes * link_rate);
> + val /= (dp->max_lanes * link_rate);
> val = div_u64(8 * (symbol + 1), bit_per_pix) - val;
> val += 2;
> ret = cdn_dp_reg_write(dp, DP_VC_TABLE(15), val);
> @@ -833,7 +832,7 @@ static void cdn_dp_audio_config_i2s(struct cdn_dp_device *dp,
> u32 val;
>
> if (audio->channels == 2) {
> - if (dp->link.num_lanes == 1)
> + if (dp->max_lanes == 1)
> sub_pckt_num = 2;
> else
> sub_pckt_num = 4;
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> --
> 2.23.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2019-10-22 14:02 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-21 14:34 [PATCH v3 00/13] drm/dp: Move drm_dp_link helpers to Tegra DRM Thierry Reding
2019-10-21 14:34 ` [PATCH v3 01/13] drm/dp: Sort includes alphabetically Thierry Reding
2019-10-21 14:34 ` [PATCH v3 02/13] drm/dp: Remove a gratuituous blank line Thierry Reding
2019-10-21 14:34 ` [PATCH v3 03/13] drm/dp: Add drm_dp_fast_training_cap() helper Thierry Reding
2019-10-21 14:34 ` [PATCH v3 04/13] drm/dp: Add drm_dp_channel_coding_supported() helper Thierry Reding
2019-10-21 14:34 ` [PATCH v3 05/13] drm/dp: Add drm_dp_alternate_scrambler_reset_cap() helper Thierry Reding
2019-10-21 14:34 ` [PATCH v3 06/13] drm/dp: Do not busy-loop during link training Thierry Reding
2019-10-22 14:04 ` Daniel Vetter
2019-10-21 14:34 ` [PATCH v3 07/13] drm/dp: Add helper to get post-cursor adjustments Thierry Reding
2019-10-21 14:34 ` [PATCH v3 08/13] drm/bridge: analogix-anx78xx: Avoid drm_dp_link helpers Thierry Reding
2019-10-22 13:29 ` Daniel Vetter
2019-10-22 14:52 ` [PATCH v4] " Thierry Reding
2019-10-23 9:13 ` Daniel Vetter
2019-10-21 14:34 ` [PATCH v3 09/13] drm/bridge: tc358767: " Thierry Reding
2019-10-22 13:38 ` Daniel Vetter
2019-10-21 14:34 ` [PATCH v3 10/13] drm/bridge: tc358767: Use DP nomenclature Thierry Reding
2019-10-21 14:34 ` [PATCH v3 11/13] drm/msm: edp: Avoid drm_dp_link helpers Thierry Reding
2019-10-22 13:53 ` Daniel Vetter
2019-10-21 14:34 ` [PATCH v3 12/13] drm/rockchip: " Thierry Reding
2019-10-22 14:01 ` Daniel Vetter [this message]
2019-10-21 14:34 ` [PATCH v3 13/13] drm/tegra: Move drm_dp_link helpers to Tegra DRM Thierry Reding
2019-10-22 14:03 ` Daniel Vetter
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