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Tue, 15 Sep 2020 08:41:20 -0700 (PDT) Received: from xps15 ([64.188.179.253]) by smtp.gmail.com with ESMTPSA id s2sm9369515ili.49.2020.09.15.08.41.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2020 08:41:19 -0700 (PDT) Received: (nullmailer pid 1999129 invoked by uid 1000); Tue, 15 Sep 2020 15:41:19 -0000 Date: Tue, 15 Sep 2020 09:41:19 -0600 From: Rob Herring To: Neil Armstrong Subject: Re: [PATCH 2/6] dt-bindings: display: add Amlogic MIPI DSI Host Controller bindings Message-ID: <20200915154118.GA1988840@bogus> References: <20200907081825.1654-1-narmstrong@baylibre.com> <20200907081825.1654-3-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200907081825.1654-3-narmstrong@baylibre.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-amlogic@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, Sep 07, 2020 at 10:18:21AM +0200, Neil Armstrong wrote: > The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a), with a custom > glue managing the IP resets, clock and data input similar to the DW-HDMI Glue on other > Amlogic SoCs. > > Signed-off-by: Neil Armstrong > --- > .../display/amlogic,meson-dw-mipi-dsi.yaml | 115 ++++++++++++++++++ > 1 file changed, 115 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml > > diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml > new file mode 100644 > index 000000000000..6177f45ea1a6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml > @@ -0,0 +1,115 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2020 BayLibre, SAS > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/display/amlogic,meson-dw-mipi-dsi.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic specific extensions to the Synopsys Designware MIPI DSI Host Controller > + > +maintainers: > + - Neil Armstrong > + > +description: | > + The Amlogic Meson Synopsys Designware Integration is composed of > + - A Synopsys DesignWare MIPI DSI Host Controller IP > + - A TOP control block controlling the Clocks & Resets of the IP > + > +allOf: > + - $ref: dsi-controller.yaml# > + > +properties: > + compatible: > + enum: > + - amlogic,meson-axg-dw-mipi-dsi > + > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 2 > + > + clock-names: > + minItems: 2 > + items: > + - const: pclk > + - const: px_clk > + - const: meas_clk > + > + resets: > + minItems: 1 > + > + reset-names: > + items: > + - const: top > + > + phys: > + minItems: 1 > + > + phy-names: > + items: > + - const: dphy > + > + ports: > + type: object > + > + properties: > + port@0: > + type: object > + description: Input node to receive pixel data. > + port@1: > + type: object > + description: DSI output node to panel. > + > + required: > + - port@0 > + - port@1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - resets > + - reset-names > + - phys > + - phy-names > + - ports > + > +additionalProperties: false Presumably you may have panel/bridge child nodes, so this needs to be 'unevaluatedProperties: false'. Rob _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel