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Kristensen" , Sean Paul References: <20201023165136.561680-1-robdclark@gmail.com> <20201023165136.561680-24-robdclark@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Operating-System: Linux phenom 5.7.0-1-amd64 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , David Airlie , linux-arm-msm , open list , dri-devel , Sean Paul , "Kristian H . Kristensen" , freedreno Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Fri, Oct 23, 2020 at 08:49:14PM -0700, Rob Clark wrote: > On Fri, Oct 23, 2020 at 11:20 AM Lucas Stach wrote: > > > > On Fr, 2020-10-23 at 09:51 -0700, Rob Clark wrote: > > > From: Rob Clark > > > > > > If there is only a single ring (no-preemption), everything is FIFO order > > > and there is no need to implicit-sync. > > > > > > Mesa should probably just always use MSM_SUBMIT_NO_IMPLICIT, as behavior > > > is undefined when fences are not used to synchronize buffer usage across > > > contexts (which is the only case where multiple different priority rings > > > could come into play). > > > > Really, doesn't this break cross-device implicit sync? Okay, you may > > not have many peripherals that rely on implicit sync on devices where > > Adreno is usually found, but it seems rather heavy-handed. > > > > Wouldn't it be better to only ignore fences from your own ring context > > in the implicit sync, like we do in the common DRM scheduler > > (drm_sched_dependency_optimized)? > > we already do this.. as was discussed on an earlier iteration of this patchset > > But I'm not aware of any other non-gpu related implicit sync use-case > (even on imx devices where display is decoupled from gpu).. I'll > revert the patch if someone comes up with one, but otherwise lets let > the implicit sync baggage die The thing is, dma_resv won't die, even if implicit sync is dead. We're using internally for activity tracking and memory management. If you don't set these, then we can't share generic code with msm, and I think everyone inventing their own memory management is a bit a mistake. Now you only kill the implicit write sync stuff here, but I'm not sure that's worth much since you still install all the read fences for consistency. And if userspace doesn't want to be synced, they can set the flag and do this on their own: I think you should be able to achieve exactly the same thing in mesa. Aside: If you're worried about overhead, you can do O(1) submit if you manage your ppgtt like amdgpu does. -Daniel > > BR, > -R > > > > > > > Regards, > > Lucas > > > > > Signed-off-by: Rob Clark > > > Reviewed-by: Kristian H. Kristensen > > > --- > > > drivers/gpu/drm/msm/msm_gem_submit.c | 7 ++++--- > > > 1 file changed, 4 insertions(+), 3 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c > > > index d04c349d8112..b6babc7f9bb8 100644 > > > --- a/drivers/gpu/drm/msm/msm_gem_submit.c > > > +++ b/drivers/gpu/drm/msm/msm_gem_submit.c > > > @@ -283,7 +283,7 @@ static int submit_lock_objects(struct msm_gem_submit *submit) > > > return ret; > > > } > > > > > > -static int submit_fence_sync(struct msm_gem_submit *submit, bool no_implicit) > > > +static int submit_fence_sync(struct msm_gem_submit *submit, bool implicit_sync) > > > { > > > int i, ret = 0; > > > > > > @@ -303,7 +303,7 @@ static int submit_fence_sync(struct msm_gem_submit *submit, bool no_implicit) > > > return ret; > > > } > > > > > > - if (no_implicit) > > > + if (!implicit_sync) > > > continue; > > > > > > ret = msm_gem_sync_object(&msm_obj->base, submit->ring->fctx, > > > @@ -774,7 +774,8 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, > > > if (ret) > > > goto out; > > > > > > - ret = submit_fence_sync(submit, !!(args->flags & MSM_SUBMIT_NO_IMPLICIT)); > > > + ret = submit_fence_sync(submit, (gpu->nr_rings > 1) && > > > + !(args->flags & MSM_SUBMIT_NO_IMPLICIT)); > > > if (ret) > > > goto out; > > > > > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel