From: Sam Ravnborg <sam@ravnborg.org>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: Anitha Chrisanthus <anitha.chrisanthus@intel.com>,
"Dea, Edmund J" <edmund.j.dea@intel.com>,
dri-devel <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v10 1/6] dt-bindings: display: Add support for Intel KeemBay Display
Date: Mon, 2 Nov 2020 19:04:06 +0100 [thread overview]
Message-ID: <20201102180406.GA1404335@ravnborg.org> (raw)
In-Reply-To: <bcca48b9-5baa-2842-a6f0-23a2b668272a@baylibre.com>
Hi Neil.
> >>>>> ---
> >>>>> .../bindings/display/intel,keembay-display.yaml | 75 ++++++++++++++++++++++
> >>>>> 1 file changed, 75 insertions(+)
> >>>>> create mode 100644 Documentation/devicetree/bindings/display/intel,keembay-display.yaml
> >>>>>
> >>>>> diff --git a/Documentation/devicetree/bindings/display/intel,keembay-display.yaml b/Documentation/devicetree/bindings/display/intel,keembay-display.yaml
> >>>>> new file mode 100644
> >>>>> index 0000000..8a8effe
> >>>>> --- /dev/null
> >>>>> +++ b/Documentation/devicetree/bindings/display/intel,keembay-display.yaml
> >>>>> @@ -0,0 +1,75 @@
> >>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>>>> +%YAML 1.2
> >>>>> +---
> >>>>> +$id: http://devicetree.org/schemas/display/intel,keembay-display.yaml#
> >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>>>> +
> >>>>> +title: Devicetree bindings for Intel Keem Bay display controller
> >>>>> +
> >>>>> +maintainers:
> >>>>> + - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
> >>>>> + - Edmond J Dea <edmund.j.dea@intel.com>
> >>>>> +
> >>>>> +properties:
> >>>>> + compatible:
> >>>>> + const: intel,keembay-display
> >>>>> +
> >>>>> + reg:
> >>>>> + items:
> >>>>> + - description: LCD registers range
> >>>>> + - description: Msscam registers range
> >>>>> +
> >>>
> >>> Indeed the split is much better, but as you replied on http://lore.kernel.org/r/BY5PR11MB41827DE07436DD0454E24E6E8C0A0@BY5PR11MB4182.namprd11.prod.outlook.com
> >>> the msscam seems to be shared with the camera subsystem block, if this is the case it should be handled.
> >>>
> >>> If it's a shared register block, it could be defined as a "syscon" used by both subsystems.
> >>
> >> I think I got it now.
> >>
> >> msscam is used to enable clocks both for the display driver and the
> >> mipi-dsi part.
> >
> > If just clocks, then the msscam should be a clock provider possibly.
> > If not, then the below looks right.
I am feeling a little clueless here - sorry.
Can you help with any example that does this?
Everything I looked up in bindings/clock/ had a "#clock-cells" which is
not relevant for msscam - or so I think at least.
Sam
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next prev parent reply other threads:[~2020-11-02 18:04 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-29 21:27 [PATCH v10 0/6] Add support for KeemBay DRM driver Anitha Chrisanthus
2020-10-29 21:27 ` [PATCH v10 1/6] dt-bindings: display: Add support for Intel KeemBay Display Anitha Chrisanthus
2020-10-29 22:20 ` Sam Ravnborg
2020-10-30 8:31 ` Neil Armstrong
2020-10-30 21:15 ` Sam Ravnborg
2020-11-02 15:16 ` Rob Herring
2020-11-02 16:38 ` Neil Armstrong
2020-11-02 18:04 ` Sam Ravnborg [this message]
2020-11-03 2:05 ` Rob Herring
2020-11-03 9:37 ` Neil Armstrong
2020-11-03 17:11 ` Sam Ravnborg
2020-11-03 2:02 ` Rob Herring
2020-11-03 9:36 ` Neil Armstrong
2020-10-29 21:27 ` [PATCH v10 2/6] dt-bindings: display: bridge: Intel KeemBay DSI Anitha Chrisanthus
2020-10-29 22:22 ` Sam Ravnborg
2020-10-30 8:32 ` Neil Armstrong
2020-10-29 21:27 ` [PATCH v10 3/6] drm/kmb: Keem Bay driver register definition Anitha Chrisanthus
2020-10-29 22:23 ` Sam Ravnborg
2020-10-29 21:27 ` [PATCH v10 4/6] drm/kmb: Add support for KeemBay Display Anitha Chrisanthus
2020-10-29 22:27 ` Sam Ravnborg
2020-10-29 21:27 ` [PATCH v10 5/6] drm/kmb: Mipi DSI part of the display driver Anitha Chrisanthus
2020-10-29 22:31 ` Sam Ravnborg
2020-10-29 21:27 ` [PATCH v10 6/6] drm/kmb: Build files for KeemBay Display driver Anitha Chrisanthus
2020-10-29 22:31 ` Sam Ravnborg
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