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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id z38sm1118026ooi.34.2020.12.10.19.40.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Dec 2020 19:40:35 -0800 (PST) Received: (nullmailer pid 3594506 invoked by uid 1000); Fri, 11 Dec 2020 03:40:34 -0000 Date: Thu, 10 Dec 2020 21:40:34 -0600 From: Rob Herring To: Yongqiang Niu Subject: Re: [PATCH v8, 1/6] dt-bindings: mediatek: add rdma_fifo_size description for mt8183 display Message-ID: <20201211034034.GA3593696@robh.at.kernel.org> References: <1607591262-21736-1-git-send-email-yongqiang.niu@mediatek.com> <1607591262-21736-2-git-send-email-yongqiang.niu@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1607591262-21736-2-git-send-email-yongqiang.niu@mediatek.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu, Dec 10, 2020 at 05:07:37PM +0800, Yongqiang Niu wrote: > rdma fifo size may be different even in same SOC, add this > property to the corresponding rdma > > Signed-off-by: Yongqiang Niu > --- > .../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index 1212207..64c64ee 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -66,6 +66,13 @@ Required properties (DMA function blocks): > argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > for details. > > +Optional properties (RDMA function blocks): > +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this mediatek,rdma-fifo-size > + property to the corresponding rdma > + the value is the Max value which defined in hardware data sheet. > + rdma_fifo_size of rdma0 in mt8183 is 5120 > + rdma_fifo_size of rdma1 in mt8183 is 2048 > + > Examples: > > mmsys: clock-controller@14000000 { > @@ -207,3 +214,12 @@ od@14023000 { > power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > clocks = <&mmsys CLK_MM_DISP_OD>; > }; > + > +rdma1: rdma@1400c000 { > + compatible = "mediatek,mt8183-disp-rdma"; > + reg = <0 0x1400c000 0 0x1000>; > + interrupts = ; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_RDMA1>; > + mediatek,rdma_fifo_size = <2048>; > +}; > -- > 1.8.1.1.dirty > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel