From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Sasha Levin <sashal@kernel.org>,
Philip Yang <Philip.Yang@amd.com>,
Felix Kuehling <Felix.Kuehling@amd.com>,
dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH AUTOSEL 5.12 047/134] drm/amdgpu: enable retry fault wptr overflow
Date: Mon, 3 May 2021 12:33:46 -0400 [thread overview]
Message-ID: <20210503163513.2851510-47-sashal@kernel.org> (raw)
In-Reply-To: <20210503163513.2851510-1-sashal@kernel.org>
From: Philip Yang <Philip.Yang@amd.com>
[ Upstream commit b672cb1eee59efe6ca5bb2a2ce90060a22860558 ]
If xnack is on, VM retry fault interrupt send to IH ring1, and ring1
will be full quickly. IH cannot receive other interrupts, this causes
deadlock if migrating buffer using sdma and waiting for sdma done while
handling retry fault.
Remove VMC from IH storm client, enable ring1 write pointer overflow,
then IH will drop retry fault interrupts and be able to receive other
interrupts while driver is handling retry fault.
IH ring1 write pointer doesn't writeback to memory by IH, and ring1
write pointer recorded by self-irq is not updated, so always read
the latest ring1 write pointer from register.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 32 +++++++++-----------------
drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 32 +++++++++-----------------
2 files changed, 22 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 88626d83e07b..ca8efa5c6978 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -220,10 +220,8 @@ static int vega10_ih_enable_ring(struct amdgpu_device *adev,
tmp = vega10_ih_rb_cntl(ih, tmp);
if (ih == &adev->irq.ih)
tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled);
- if (ih == &adev->irq.ih1) {
- tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 0);
+ if (ih == &adev->irq.ih1)
tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_FULL_DRAIN_ENABLE, 1);
- }
if (amdgpu_sriov_vf(adev)) {
if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) {
dev_err(adev->dev, "PSP program IH_RB_CNTL failed!\n");
@@ -265,7 +263,6 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
u32 ih_chicken;
int ret;
int i;
- u32 tmp;
/* disable irqs */
ret = vega10_ih_toggle_interrupts(adev, false);
@@ -291,15 +288,6 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
}
}
- tmp = RREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL);
- tmp = REG_SET_FIELD(tmp, IH_STORM_CLIENT_LIST_CNTL,
- CLIENT18_IS_STORM_CLIENT, 1);
- WREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL, tmp);
-
- tmp = RREG32_SOC15(OSSSYS, 0, mmIH_INT_FLOOD_CNTL);
- tmp = REG_SET_FIELD(tmp, IH_INT_FLOOD_CNTL, FLOOD_CNTL_ENABLE, 1);
- WREG32_SOC15(OSSSYS, 0, mmIH_INT_FLOOD_CNTL, tmp);
-
pci_set_master(adev->pdev);
/* enable interrupts */
@@ -345,11 +333,17 @@ static u32 vega10_ih_get_wptr(struct amdgpu_device *adev,
u32 wptr, tmp;
struct amdgpu_ih_regs *ih_regs;
- wptr = le32_to_cpu(*ih->wptr_cpu);
- ih_regs = &ih->ih_regs;
+ if (ih == &adev->irq.ih) {
+ /* Only ring0 supports writeback. On other rings fall back
+ * to register-based code with overflow checking below.
+ */
+ wptr = le32_to_cpu(*ih->wptr_cpu);
- if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
- goto out;
+ if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
+ goto out;
+ }
+
+ ih_regs = &ih->ih_regs;
/* Double check that the overflow wasn't already cleared. */
wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr);
@@ -440,15 +434,11 @@ static int vega10_ih_self_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- uint32_t wptr = cpu_to_le32(entry->src_data[0]);
-
switch (entry->ring_id) {
case 1:
- *adev->irq.ih1.wptr_cpu = wptr;
schedule_work(&adev->irq.ih1_work);
break;
case 2:
- *adev->irq.ih2.wptr_cpu = wptr;
schedule_work(&adev->irq.ih2_work);
break;
default: break;
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
index 5a3c867d5881..75b06e1964ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
@@ -220,10 +220,8 @@ static int vega20_ih_enable_ring(struct amdgpu_device *adev,
tmp = vega20_ih_rb_cntl(ih, tmp);
if (ih == &adev->irq.ih)
tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled);
- if (ih == &adev->irq.ih1) {
- tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 0);
+ if (ih == &adev->irq.ih1)
tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_FULL_DRAIN_ENABLE, 1);
- }
if (amdgpu_sriov_vf(adev)) {
if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) {
dev_err(adev->dev, "PSP program IH_RB_CNTL failed!\n");
@@ -297,7 +295,6 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
u32 ih_chicken;
int ret;
int i;
- u32 tmp;
/* disable irqs */
ret = vega20_ih_toggle_interrupts(adev, false);
@@ -326,15 +323,6 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
}
}
- tmp = RREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL);
- tmp = REG_SET_FIELD(tmp, IH_STORM_CLIENT_LIST_CNTL,
- CLIENT18_IS_STORM_CLIENT, 1);
- WREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL, tmp);
-
- tmp = RREG32_SOC15(OSSSYS, 0, mmIH_INT_FLOOD_CNTL);
- tmp = REG_SET_FIELD(tmp, IH_INT_FLOOD_CNTL, FLOOD_CNTL_ENABLE, 1);
- WREG32_SOC15(OSSSYS, 0, mmIH_INT_FLOOD_CNTL, tmp);
-
pci_set_master(adev->pdev);
/* enable interrupts */
@@ -380,11 +368,17 @@ static u32 vega20_ih_get_wptr(struct amdgpu_device *adev,
u32 wptr, tmp;
struct amdgpu_ih_regs *ih_regs;
- wptr = le32_to_cpu(*ih->wptr_cpu);
- ih_regs = &ih->ih_regs;
+ if (ih == &adev->irq.ih) {
+ /* Only ring0 supports writeback. On other rings fall back
+ * to register-based code with overflow checking below.
+ */
+ wptr = le32_to_cpu(*ih->wptr_cpu);
- if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
- goto out;
+ if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
+ goto out;
+ }
+
+ ih_regs = &ih->ih_regs;
/* Double check that the overflow wasn't already cleared. */
wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr);
@@ -476,15 +470,11 @@ static int vega20_ih_self_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- uint32_t wptr = cpu_to_le32(entry->src_data[0]);
-
switch (entry->ring_id) {
case 1:
- *adev->irq.ih1.wptr_cpu = wptr;
schedule_work(&adev->irq.ih1_work);
break;
case 2:
- *adev->irq.ih2.wptr_cpu = wptr;
schedule_work(&adev->irq.ih2_work);
break;
default: break;
--
2.30.2
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next prev parent reply other threads:[~2021-05-03 16:36 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-03 16:33 [PATCH AUTOSEL 5.12 001/134] drm: Added orientation quirk for OneGX1 Pro Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 002/134] drm/qxl: do not run release if qxl failed to init Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 003/134] drm/qxl: release shadow on shutdown Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 004/134] drm/ast: Fix invalid usage of AST_MAX_HWC_WIDTH in cursor atomic_check Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 005/134] drm/amd/display: changing sr exit latency Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 006/134] drm/amd/display: Fix MPC OGAM power on/off sequence Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 007/134] drm/amd/pm: do not issue message while write "r" into pp_od_clk_voltage Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 008/134] drm/ast: fix memory leak when unload the driver Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 009/134] drm/amd/display: Check for DSC support instead of ASIC revision Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 010/134] drm/amd/display: Don't optimize bandwidth before disabling planes Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 011/134] drm/amd/display: Return invalid state if GPINT times out Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 012/134] drm/amdgpu/display: buffer INTERRUPT_LOW_IRQ_CONTEXT interrupt work Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 013/134] drm/amd/display/dc/dce/dce_aux: Remove duplicate line causing 'field overwritten' issue Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 019/134] drm/amd/pm/swsmu: clean up user profile function Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 020/134] drm/amdgpu: Fix some unload driver issues Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 025/134] drm/virtio: fix possible leak/unlock virtio_gpu_object_array Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 043/134] backlight: qcom-wled: Use sink_addr for sync toggle Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 044/134] backlight: qcom-wled: Fix FSC update issue for WLED5 Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 045/134] drm/bridge/analogix/anx78xx: Setup encoder before registering connector Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 046/134] drm/bridge/analogix/anx78xx: Cleanup on error in anx78xx_bridge_attach() Sasha Levin
2021-05-03 16:33 ` Sasha Levin [this message]
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 048/134] drm/amdgpu: enable 48-bit IH timestamp counter Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 049/134] drm/amdgpu: mask the xgmi number of hops reported from psp to kfd Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 050/134] drm/amdkfd: Fix UBSAN shift-out-of-bounds warning Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 051/134] drm/amd/display: Align cursor cache address to 2KB Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 052/134] drm/amdgpu : Fix asic reset regression issue introduce by 8f211fe8ac7c4f Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 053/134] drm/amd/pm: fix workload mismatch on vega10 Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 054/134] drm/amd/display: Fix UBSAN warning for not a valid value for type '_Bool' Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 055/134] drm/amd/display: DCHUB underflow counter increasing in some scenarios Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 056/134] drm/amd/display: fix dml prefetch validation Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 057/134] drm/amd/display: Fix potential memory leak Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 058/134] drm/amdgpu: Fix " Sasha Levin
2021-05-03 16:33 ` [PATCH AUTOSEL 5.12 060/134] drm/vkms: fix misuse of WARN_ON Sasha Levin
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