dri-devel.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel <dri-devel@lists.freedesktop.org>
Cc: Hellstrom Thomas <thomas.hellstrom@intel.com>,
	Matthew Auld <matthew.auld@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Bruce Chang <yu.bruce.chang@intel.com>
Subject: [PATCH 4/5] drm/i915/dg2: Add Wa_22011100796
Date: Sat, 29 Jan 2022 00:22:08 +0530	[thread overview]
Message-ID: <20220128185209.18077-5-ramalingam.c@intel.com> (raw)
In-Reply-To: <20220128185209.18077-1-ramalingam.c@intel.com>

From: Bruce Chang <yu.bruce.chang@intel.com>

Whenever Full soft reset is required, reset all individual engines
first, and then do a full soft reset.

Signed-off-by: Bruce Chang <yu.bruce.chang@intel.com>
cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_reset.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 6f2821cca409..5fae56b89319 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -600,6 +600,15 @@ static int gen8_reset_engines(struct intel_gt *gt,
 		 */
 	}
 
+	/*
+	 * Wa_22011100796:dg2, whenever Full soft reset is required,
+	 * reset all individual engines firstly, and then do a full soft reset.
+	 *
+	 * This is best effort, so ignore any error from the initial reset.
+	 */
+	if (IS_DG2(gt->i915) && engine_mask == ALL_ENGINES)
+		gen11_reset_engines(gt, gt->info.engine_mask, 0);
+
 	if (GRAPHICS_VER(gt->i915) >= 11)
 		ret = gen11_reset_engines(gt, engine_mask, retry);
 	else
-- 
2.20.1


  parent reply	other threads:[~2022-01-28 18:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-28 18:52 [PATCH 0/5] Misc DG2 enabling patches Ramalingam C
2022-01-28 18:52 ` [PATCH 1/5] drm/i915/dg2: Add Wa_22011450934 Ramalingam C
2022-02-07 11:48   ` [Intel-gfx] " Matthew Auld
2022-02-07 11:52     ` Matthew Auld
2022-02-11 13:34       ` Ramalingam C
2022-01-28 18:52 ` [PATCH 2/5] drm/i915: align the plane_vma to min_page_size of stolen mem Ramalingam C
2022-01-31 10:18   ` Matthew Auld
2022-01-31 10:26     ` [Intel-gfx] " Matthew Auld
2022-01-28 18:52 ` [PATCH 3/5] drm/i915: More gt idling time with guc submission Ramalingam C
2022-01-31 10:19   ` Matthew Auld
2022-01-28 18:52 ` Ramalingam C [this message]
2022-01-31 11:06   ` [Intel-gfx] [PATCH 4/5] drm/i915/dg2: Add Wa_22011100796 Matthew Auld
2022-01-28 18:52 ` [PATCH 5/5] drm/i915/guc: Allow user to override driver load failure without GuC Ramalingam C
2022-02-07 16:55   ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-02-11 13:32     ` Ramalingam C

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220128185209.18077-5-ramalingam.c@intel.com \
    --to=ramalingam.c@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.auld@intel.com \
    --cc=rodrigo.vivi@intel.com \
    --cc=thomas.hellstrom@intel.com \
    --cc=yu.bruce.chang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).