From: John.C.Harrison@Intel.com
To: Intel-GFX@Lists.FreeDesktop.Org
Cc: John Harrison <John.C.Harrison@Intel.com>,
DRI-Devel@Lists.FreeDesktop.Org
Subject: [PATCH v2 2/3] drm/i915/gt: Make the heartbeat play nice with long pre-emption timeouts
Date: Fri, 25 Feb 2022 12:41:50 -0800 [thread overview]
Message-ID: <20220225204151.2248027-3-John.C.Harrison@Intel.com> (raw)
In-Reply-To: <20220225204151.2248027-1-John.C.Harrison@Intel.com>
From: John Harrison <John.C.Harrison@Intel.com>
Compute workloads are inherently not pre-emptible for long periods on
current hardware. As a workaround for this, the pre-emption timeout
for compute capable engines was disabled. This is undesirable with GuC
submission as it prevents per engine reset of hung contexts. Hence the
next patch will re-enable the timeout but bumped up by an order of
magnitude.
However, the heartbeat might not respect that. Depending upon current
activity, a pre-emption to the heartbeat pulse might not even be
attempted until the last heartbeat period. Which means that only one
period is granted for the pre-emption to occur. With the aforesaid
bump, the pre-emption timeout could be significantly larger than this
heartbeat period.
So adjust the heartbeat code to take the pre-emption timeout into
account. When it reaches the final (high priority) period, it now
ensures the delay before hitting reset is bigger than the pre-emption
timeout.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
index a3698f611f45..72a82a6085e0 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
@@ -22,9 +22,25 @@
static bool next_heartbeat(struct intel_engine_cs *engine)
{
+ struct i915_request *rq;
long delay;
delay = READ_ONCE(engine->props.heartbeat_interval_ms);
+
+ rq = engine->heartbeat.systole;
+ if (rq && rq->sched.attr.priority >= I915_PRIORITY_BARRIER) {
+ long longer;
+
+ /*
+ * The final try is at the highest priority possible. Up until now
+ * a pre-emption might not even have been attempted. So make sure
+ * this last attempt allows enough time for a pre-emption to occur.
+ */
+ longer = READ_ONCE(engine->props.preempt_timeout_ms) * 2;
+ if (longer > delay)
+ delay = longer;
+ }
+
if (!delay)
return false;
--
2.25.1
next prev parent reply other threads:[~2022-02-25 20:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-25 20:41 [PATCH v2 0/3] Improve anti-pre-emption w/a for compute workloads John.C.Harrison
2022-02-25 20:41 ` [PATCH v2 1/3] drm/i915/guc: Limit scheduling properties to avoid overflow John.C.Harrison
2022-03-02 9:49 ` [Intel-gfx] " Tvrtko Ursulin
2022-03-02 18:22 ` John Harrison
2022-03-03 10:06 ` Tvrtko Ursulin
2022-02-25 20:41 ` John.C.Harrison [this message]
2022-02-25 20:41 ` [PATCH v2 3/3] drm/i915: Improve long running OCL w/a for GuC submission John.C.Harrison
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