From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 52F8DC433FE for ; Tue, 12 Apr 2022 00:51:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7166D10FB16; Tue, 12 Apr 2022 00:51:02 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id D117410FB14; Tue, 12 Apr 2022 00:51:00 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5E35C60B2E; Tue, 12 Apr 2022 00:51:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ED33EC385A3; Tue, 12 Apr 2022 00:50:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649724659; bh=nKmMu+KnxSgHmcBz+S9jEpKqr6ERgs4IgBTbiWUWDSE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IzFYhUUiIZ0+K9pBMrlzBPQlTv0YijQY+wXsenwFY30MR7uCX0NlMF6RCQIjkb/gq qS8HI8BKLYbG2lFBj2HuYGnKwr6z97Zdf/q8L54mlqSqV5n9UfHYoYBL9FvOxrMUIs i1+iMDehOUbiovWMk56nf8sGtSUpdn6FBNpqw82BSZcM15tWTwxS+vBLfWI3ncX8lU jzdd9AeMFkTSZkhC88LceexHT9pa7wFK1I0G5yb9ITME+1dE740Qzoy/so/lD8xfna 26DGZcKs5k2RkAMCmAMeFcqvn1OnqPxAp0/BY2lJ+uWcUDdMcs4a5Bls0f7U0jY6R7 JgklxQhN7yQQw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH AUTOSEL 5.4 03/21] drm/amd/display: Update VTEM Infopacket definition Date: Mon, 11 Apr 2022 20:50:22 -0400 Message-Id: <20220412005042.351105-3-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220412005042.351105-1-sashal@kernel.org> References: <20220412005042.351105-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sasha Levin , Krunoslav.Kovac@amd.com, Chris Park , Alex Hung , airlied@linux.ie, Xinhui.Pan@amd.com, Rodrigo.Siqueira@amd.com, amd-gfx@lists.freedesktop.org, sunpeng.li@amd.com, Daniel Wheeler , Reza.Amini@amd.com, dri-devel@lists.freedesktop.org, Alex Deucher , "Leo \(Hanghong\) Ma" , christian.koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: "Leo (Hanghong) Ma" [ Upstream commit c9fbf6435162ed5fb7201d1d4adf6585c6a8c327 ] [Why & How] The latest HDMI SPEC has updated the VTEM packet structure, so change the VTEM Infopacket defined in the driver side to align with the SPEC. Reviewed-by: Chris Park Acked-by: Alex Hung Signed-off-by: Leo (Hanghong) Ma Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- .../gpu/drm/amd/display/modules/info_packet/info_packet.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c index d885d642ed7f..537736713598 100644 --- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c +++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c @@ -85,7 +85,8 @@ //PB7 = MD0 #define MASK_VTEM_MD0__VRR_EN 0x01 #define MASK_VTEM_MD0__M_CONST 0x02 -#define MASK_VTEM_MD0__RESERVED2 0x0C +#define MASK_VTEM_MD0__QMS_EN 0x04 +#define MASK_VTEM_MD0__RESERVED2 0x08 #define MASK_VTEM_MD0__FVA_FACTOR_M1 0xF0 //MD1 @@ -94,7 +95,7 @@ //MD2 #define MASK_VTEM_MD2__BASE_REFRESH_RATE_98 0x03 #define MASK_VTEM_MD2__RB 0x04 -#define MASK_VTEM_MD2__RESERVED3 0xF8 +#define MASK_VTEM_MD2__NEXT_TFR 0xF8 //MD3 #define MASK_VTEM_MD3__BASE_REFRESH_RATE_07 0xFF -- 2.35.1