From: Oded Gabbay <ogabbay@kernel.org>
To: dri-devel@lists.freedesktop.org
Cc: Rakesh Ughreja <rughreja@habana.ai>
Subject: [PATCH 2/4] accel/habanalabs: allow user to modify EDMA RL register
Date: Sun, 16 Apr 2023 14:30:48 +0300 [thread overview]
Message-ID: <20230416113050.2815620-2-ogabbay@kernel.org> (raw)
In-Reply-To: <20230416113050.2815620-1-ogabbay@kernel.org>
From: Rakesh Ughreja <rughreja@habana.ai>
EDMA transpose workload requires to signal for every activation.
User FW sends all the dummy signals to RD_LBW_RATE_LIM_CFG, to save
lbw bandwidth. We need the user to be able to access that register to
configure it.
Signed-off-by: Rakesh Ughreja <rughreja@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
---
drivers/accel/habanalabs/gaudi2/gaudi2_security.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/accel/habanalabs/gaudi2/gaudi2_security.c b/drivers/accel/habanalabs/gaudi2/gaudi2_security.c
index 694735f9e6e6..acd33130e7f9 100644
--- a/drivers/accel/habanalabs/gaudi2/gaudi2_security.c
+++ b/drivers/accel/habanalabs/gaudi2/gaudi2_security.c
@@ -479,6 +479,7 @@ static const u32 gaudi2_pb_dcr0_edma0_unsecured_regs[] = {
mmDCORE0_EDMA0_CORE_CTX_TE_NUMROWS,
mmDCORE0_EDMA0_CORE_CTX_IDX,
mmDCORE0_EDMA0_CORE_CTX_IDX_INC,
+ mmDCORE0_EDMA0_CORE_RD_LBW_RATE_LIM_CFG,
mmDCORE0_EDMA0_QM_CQ_CFG0_0,
mmDCORE0_EDMA0_QM_CQ_CFG0_1,
mmDCORE0_EDMA0_QM_CQ_CFG0_2,
--
2.40.0
next prev parent reply other threads:[~2023-04-16 11:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-16 11:30 [PATCH 1/4] accel/habanalabs: ignore false positive razwi Oded Gabbay
2023-04-16 11:30 ` Oded Gabbay [this message]
2023-04-16 11:30 ` [PATCH 3/4] accel/habanalabs: remove commented code that won't be used Oded Gabbay
2023-04-16 11:30 ` [PATCH 4/4] accel/habanalabs: fix bug in free scratchpad memory Oded Gabbay
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