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From: Andi Shyti <andi.shyti@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
	Matt Roper <matthew.d.roper@intel.com>,
	Chris Wilson <chris@chris-wilson.co.uk>,
	Mika Kuoppala <mika.kuoppala@linux.intel.com>,
	Nirmoy Das <nirmoy.das@intel.com>,
	Andrzej Hajda <andrzej.hajda@intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>,
	linux-stable <stable@vger.kernel.org>,
	dri-evel <dri-devel@lists.freedesktop.org>,
	Andi Shyti <andi.shyti@linux.intel.com>
Subject: [PATCH v8 2/9] drm/i915: Add the gen12_needs_ccs_aux_inv helper
Date: Fri, 21 Jul 2023 18:15:07 +0200	[thread overview]
Message-ID: <20230721161514.818895-3-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20230721161514.818895-1-andi.shyti@linux.intel.com>

We always assumed that a device might either have AUX or FLAT
CCS, but this is an approximation that is not always true, e.g.
PVC represents an exception.

Set the basis for future finer selection by implementing a
boolean gen12_needs_ccs_aux_inv() function that tells whether aux
invalidation is needed or not.

Currently PVC is the only exception to the above mentioned rule.

Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: <stable@vger.kernel.org> # v5.8+
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 563efee055602..460c9225a50fc 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -165,6 +165,18 @@ static u32 preparser_disable(bool state)
 	return MI_ARB_CHECK | 1 << 8 | state;
 }
 
+static bool gen12_needs_ccs_aux_inv(struct intel_engine_cs *engine)
+{
+	if (IS_PONTEVECCHIO(engine->i915))
+		return false;
+
+	/*
+	 * so far platforms supported by i915 having
+	 * flat ccs do not require AUX invalidation
+	 */
+	return !HAS_FLAT_CCS(engine->i915);
+}
+
 u32 *gen12_emit_aux_table_inv(struct intel_gt *gt, u32 *cs, const i915_reg_t inv_reg)
 {
 	u32 gsi_offset = gt->uncore->gsi_offset;
@@ -267,7 +279,7 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
 		else if (engine->class == COMPUTE_CLASS)
 			flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
 
-		if (!HAS_FLAT_CCS(rq->engine->i915))
+		if (gen12_needs_ccs_aux_inv(rq->engine))
 			count = 8 + 4;
 		else
 			count = 8;
@@ -285,7 +297,7 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
 
 		cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);
 
-		if (!HAS_FLAT_CCS(rq->engine->i915)) {
+		if (gen12_needs_ccs_aux_inv(rq->engine)) {
 			/* hsdes: 1809175790 */
 			cs = gen12_emit_aux_table_inv(rq->engine->gt, cs,
 						      GEN12_CCS_AUX_INV);
@@ -307,7 +319,7 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
 	if (mode & EMIT_INVALIDATE) {
 		cmd += 2;
 
-		if (!HAS_FLAT_CCS(rq->engine->i915) &&
+		if (gen12_needs_ccs_aux_inv(rq->engine) &&
 		    (rq->engine->class == VIDEO_DECODE_CLASS ||
 		     rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) {
 			aux_inv = rq->engine->mask &
-- 
2.40.1


  parent reply	other threads:[~2023-07-21 16:15 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21 16:15 [PATCH v8 0/9] Update AUX invalidation sequence Andi Shyti
2023-07-21 16:15 ` [PATCH v8 1/9] drm/i915/gt: Cleanup aux invalidation registers Andi Shyti
2023-07-21 16:15 ` Andi Shyti [this message]
2023-07-21 19:12   ` [PATCH v8 2/9] drm/i915: Add the gen12_needs_ccs_aux_inv helper Matt Roper
2023-07-24  7:52   ` Andrzej Hajda
2023-07-24  8:38   ` [Intel-gfx] " Nirmoy Das
2023-07-21 16:15 ` [PATCH v8 3/9] drm/i915/gt: Ensure memory quiesced before invalidation Andi Shyti
2023-07-21 16:15 ` [PATCH v8 4/9] drm/i915/gt: Rename flags with bit_group_X according to the datasheet Andi Shyti
2023-07-21 16:15 ` [PATCH v8 5/9] drm/i915/gt: Enable the CCS_FLUSH bit in the pipe control Andi Shyti
2023-07-21 19:16   ` Matt Roper
2023-07-24  7:53   ` Andrzej Hajda
2023-07-24  8:47   ` [Intel-gfx] " Nirmoy Das
2023-07-21 16:15 ` [PATCH v8 6/9] drm/i915/gt: Refactor intel_emit_pipe_control_cs() in a single function Andi Shyti
2023-07-24  7:54   ` Andrzej Hajda
2023-07-24  9:07   ` Nirmoy Das
2023-07-24  9:16     ` Andi Shyti
2023-07-24  9:37       ` Nirmoy Das
2023-07-21 16:15 ` [PATCH v8 7/9] drm/i915/gt: Ensure memory quiesced before invalidation for all engines Andi Shyti
2023-07-24  8:19   ` Andrzej Hajda
2023-07-24  9:14     ` Andi Shyti
2023-07-24  9:17       ` Andrzej Hajda
2023-07-21 16:15 ` [PATCH v8 8/9] drm/i915/gt: Poll aux invalidation register bit on invalidation Andi Shyti
2023-07-21 16:15 ` [PATCH v8 9/9] drm/i915/gt: Support aux invalidation on all engines Andi Shyti
2023-07-24  9:42   ` [Intel-gfx] " Andrzej Hajda
2023-07-24 14:35     ` Andi Shyti

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