From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Sasha Levin <sashal@kernel.org>,
Tom Chung <chiahsuan.chung@amd.com>,
sunpeng.li@amd.com, dri-devel@lists.freedesktop.org,
Xinhui.Pan@amd.com, amd-gfx@lists.freedesktop.org,
airlied@linux.ie, Daniel Wheeler <daniel.wheeler@amd.com>,
Nevenko Stupar <nevenko.stupar@amd.com>,
Alvin Lee <alvin.lee2@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
Jun Lei <jun.lei@amd.com>,
christian.koenig@amd.com
Subject: [PATCH AUTOSEL 6.1 27/41] drm/amd/display: Apply 60us prefetch for DCFCLK <= 300Mhz
Date: Sun, 23 Jul 2023 21:21:00 -0400 [thread overview]
Message-ID: <20230724012118.2316073-27-sashal@kernel.org> (raw)
In-Reply-To: <20230724012118.2316073-1-sashal@kernel.org>
From: Alvin Lee <alvin.lee2@amd.com>
[ Upstream commit 7e60ab4eb3e4ba2adac46d737fdbbc5732bebd58 ]
[Description]
- Previously we wanted to apply extra 60us of prefetch for min DCFCLK
(200Mhz), but DCFCLK can be calculated to be 201Mhz which underflows
also without the extra prefetch
- Instead, apply the the extra 60us prefetch for any DCFCLK freq <=
300Mhz
Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com>
Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
.../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 4 ++--
.../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index 2bb768413c92a..19f55657272e4 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -808,7 +808,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
v->SwathHeightC[k],
TWait,
(v->DRAMSpeedPerState[mode_lib->vba.VoltageLevel] <= MEM_STROBE_FREQ_MHZ ||
- v->DCFCLKPerState[mode_lib->vba.VoltageLevel] <= MIN_DCFCLK_FREQ_MHZ) ?
+ v->DCFCLKPerState[mode_lib->vba.VoltageLevel] <= DCFCLK_FREQ_EXTRA_PREFETCH_REQ_MHZ) ?
mode_lib->vba.ip.min_prefetch_in_strobe_us : 0,
/* Output */
&v->DSTXAfterScaler[k],
@@ -3289,7 +3289,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
v->swath_width_chroma_ub_this_state[k],
v->SwathHeightYThisState[k],
v->SwathHeightCThisState[k], v->TWait,
- (v->DRAMSpeedPerState[i] <= MEM_STROBE_FREQ_MHZ || v->DCFCLKState[i][j] <= MIN_DCFCLK_FREQ_MHZ) ?
+ (v->DRAMSpeedPerState[i] <= MEM_STROBE_FREQ_MHZ || v->DCFCLKState[i][j] <= DCFCLK_FREQ_EXTRA_PREFETCH_REQ_MHZ) ?
mode_lib->vba.ip.min_prefetch_in_strobe_us : 0,
/* Output */
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h
index e92eee2c664d0..a475775bc3894 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h
@@ -52,7 +52,7 @@
#define BPP_BLENDED_PIPE 0xffffffff
#define MEM_STROBE_FREQ_MHZ 1600
-#define MIN_DCFCLK_FREQ_MHZ 200
+#define DCFCLK_FREQ_EXTRA_PREFETCH_REQ_MHZ 300
#define MEM_STROBE_MAX_DELIVERY_TIME_US 60.0
struct display_mode_lib;
--
2.39.2
next prev parent reply other threads:[~2023-07-24 1:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-24 1:20 [PATCH AUTOSEL 6.1 01/41] drm/amd/display: Do not set drr on pipe commit Sasha Levin
2023-07-24 1:20 ` [PATCH AUTOSEL 6.1 02/41] drm/amdgpu: fix calltrace warning in amddrm_buddy_fini Sasha Levin
2023-07-24 1:20 ` [PATCH AUTOSEL 6.1 03/41] drm/radeon: Fix integer overflow in radeon_cs_parser_init Sasha Levin
2023-07-24 1:20 ` [PATCH AUTOSEL 6.1 04/41] drm/amdgpu: Fix integer overflow in amdgpu_cs_pass1 Sasha Levin
2023-07-24 1:20 ` [PATCH AUTOSEL 6.1 05/41] drm/amdgpu: fix memory leak in mes self test Sasha Levin
2023-07-24 1:20 ` [PATCH AUTOSEL 6.1 11/41] drm/stm: ltdc: fix late dereference check Sasha Levin
2023-07-24 1:20 ` [PATCH AUTOSEL 6.1 12/41] drm: rcar-du: remove R-Car H3 ES1.* workarounds Sasha Levin
2023-07-24 1:20 ` [PATCH AUTOSEL 6.1 26/41] drm/amdgpu: install stub fence into potential unused fence pointers Sasha Levin
2023-07-24 1:21 ` Sasha Levin [this message]
2023-07-24 1:21 ` [PATCH AUTOSEL 6.1 28/41] Revert "drm/amd/display: Do not set drr on pipe commit" Sasha Levin
2023-07-24 10:46 ` Michel Dänzer
2023-07-24 1:21 ` [PATCH AUTOSEL 6.1 31/41] drm/amd/display: Skip DPP DTO update if root clock is gated Sasha Levin
2023-07-24 1:21 ` [PATCH AUTOSEL 6.1 32/41] drm/amd/display: Enable dcn314 DPP RCO Sasha Levin
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