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From: Boris Brezillon <boris.brezillon@collabora.com>
To: "Boris Brezillon" <boris.brezillon@collabora.com>,
	"Steven Price" <steven.price@arm.com>,
	"Liviu Dudau" <liviu.dudau@arm.com>,
	"Adrián Larumbe" <adrian.larumbe@collabora.com>
Cc: dri-devel@lists.freedesktop.org, kernel@collabora.com
Subject: Re: [PATCH 3/3] drm/panthor: Let IRQ handlers clear the interrupts themselves
Date: Tue, 1 Apr 2025 10:18:30 +0200	[thread overview]
Message-ID: <20250401101830.30aa151d@collabora.com> (raw)
In-Reply-To: <20250401075710.2638950-4-boris.brezillon@collabora.com>

On Tue,  1 Apr 2025 09:57:10 +0200
Boris Brezillon <boris.brezillon@collabora.com> wrote:

> MMU handler needs to be in control of the job interrupt clears because
> clearing the interrupt also unblocks the writer/reader that triggered
> the fault, and we don't want it to be unblocked until we've had a chance
> to process the IRQ.
> 
> Since clearing the clearing is just one line, let's make it explicit
> instead of doing it in the generic code path.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  drivers/gpu/drm/panthor/panthor_device.h | 2 --
>  drivers/gpu/drm/panthor/panthor_fw.c     | 2 ++
>  drivers/gpu/drm/panthor/panthor_gpu.c    | 2 ++
>  drivers/gpu/drm/panthor/panthor_mmu.c    | 2 ++
>  4 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h
> index da6574021664..4c27b6d85f46 100644
> --- a/drivers/gpu/drm/panthor/panthor_device.h
> +++ b/drivers/gpu/drm/panthor/panthor_device.h
> @@ -383,8 +383,6 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da
>  		if (!status)									\
>  			break;									\
>  												\
> -		gpu_write(ptdev, __reg_prefix ## _INT_CLEAR, status);				\
> -												\
>  		__handler(ptdev, status);							\
>  		ret = IRQ_HANDLED;								\
>  	}											\
> diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
> index 0f52766a3120..446bb377b953 100644
> --- a/drivers/gpu/drm/panthor/panthor_fw.c
> +++ b/drivers/gpu/drm/panthor/panthor_fw.c
> @@ -1008,6 +1008,8 @@ static void panthor_fw_init_global_iface(struct panthor_device *ptdev)
>  
>  static void panthor_job_irq_handler(struct panthor_device *ptdev, u32 status)
>  {
> +	gpu_write(ptdev, JOB_INT_CLEAR, status);
> +
>  	if (!ptdev->fw->booted && (status & JOB_INT_GLOBAL_IF))
>  		ptdev->fw->booted = true;
>  
> diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c
> index 671049020afa..32d678a0114e 100644
> --- a/drivers/gpu/drm/panthor/panthor_gpu.c
> +++ b/drivers/gpu/drm/panthor/panthor_gpu.c
> @@ -150,6 +150,8 @@ static void panthor_gpu_init_info(struct panthor_device *ptdev)
>  
>  static void panthor_gpu_irq_handler(struct panthor_device *ptdev, u32 status)
>  {
> +	gpu_write(ptdev, GPU_INT_CLEAR, status);
> +
>  	if (status & GPU_IRQ_FAULT) {
>  		u32 fault_status = gpu_read(ptdev, GPU_FAULT_STATUS);
>  		u64 address = ((u64)gpu_read(ptdev, GPU_FAULT_ADDR_HI) << 32) |
> diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c
> index 7cca97d298ea..1ecb20bfbc92 100644
> --- a/drivers/gpu/drm/panthor/panthor_mmu.c
> +++ b/drivers/gpu/drm/panthor/panthor_mmu.c
> @@ -1669,6 +1669,8 @@ static void panthor_mmu_irq_handler(struct panthor_device *ptdev, u32 status)
>  {
>  	bool has_unhandled_faults = false;
>  
> +	gpu_write(ptdev, MMU_INT_CLEAR, status);

Actually, this one was meant to be moved inside the loop, and be a
per-AS clear. I'll fix that in v2.

--- a/drivers/gpu/drm/panthor/panthor_mmu.c
+++ b/drivers/gpu/drm/panthor/panthor_mmu.c
@@ -1710,6 +1710,11 @@ static void panthor_mmu_irq_handler(struct
panthor_device *ptdev, u32 status) access_type, access_type_name(ptdev,
fault_status), source_id);
 
+               /* We don't handle VM faults at the moment, so let's just clear the
+                * interrupt and let the writer/reader crash.
+                */
+               gpu_write(ptdev, MMU_INT_CLEAR, mask);
+
                /* Ignore MMU interrupts on this AS until it's been
                 * re-enabled.
                 */

      reply	other threads:[~2025-04-01  8:18 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-01  7:57 [PATCH 0/3] drm/panthor: Misc fixes Boris Brezillon
2025-04-01  7:57 ` [PATCH 1/3] drm/panthor: Call panthor_gpu_coherency_init() after PM resume() Boris Brezillon
2025-04-01 16:17   ` Liviu Dudau
2025-04-01 16:43     ` Boris Brezillon
2025-04-01  7:57 ` [PATCH 2/3] drm/panthor: Update panthor_mmu::irq::mask when needed Boris Brezillon
2025-04-01 16:18   ` Liviu Dudau
2025-04-01  7:57 ` [PATCH 3/3] drm/panthor: Let IRQ handlers clear the interrupts themselves Boris Brezillon
2025-04-01  8:18   ` Boris Brezillon [this message]

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