From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1CE4CC3ABB2 for ; Wed, 28 May 2025 13:22:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8249210E2D6; Wed, 28 May 2025 13:22:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="aDDD7Asz"; dkim-atps=neutral Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 217BE10E2DD for ; Wed, 28 May 2025 13:22:01 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 3BE5640BFE; Wed, 28 May 2025 13:21:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2D9EBC4CEE7; Wed, 28 May 2025 13:21:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748438516; bh=g+xOFZ57Bsw1wMhdPNhPQ3EPoGnnqN87CcjYVj3CF94=; h=From:To:Cc:Subject:Date:From; b=aDDD7AszRyVaRBu6mbucjjvqIYsnL0MnUri9+IbJl0PBXTbVzH38hkf9h4zKvjNLX H5Gqg7STXWEFlRHOxo5ri+u07BldrSB7YTKT8JhNqu5R8JIHpPhy42QYBPGVXWA0Hw YkbZTV2kapsJuXU2/uAe+JJ0vunTY+SNBVRW8WsE3sSPzknJVvauNxihQPEY7dN4pS GtsCEfBRBAeVajEIwGIVvMGaCkn+/B1D5czx3PzmU6RCRcewIL8Je0pNTvmJ7babpk YkGFPULzGg1PO0tMTYKRXjPObZDBgIWN7vIlVG2hJYwjk1UdlCOZl2sJoiWzL/wFUS 9OWbPrRr1bNJg== From: Michael Walle To: Douglas Anderson , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH] drm/bridge: ti-sn65dsi86: fix REFCLK setting Date: Wed, 28 May 2025 15:21:48 +0200 Message-Id: <20250528132148.1087890-1-mwalle@kernel.org> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The bridge has three bootstrap pins which are sampled to determine the frequency of the external reference clock. The driver will also (over)write that setting. But it seems this is racy after the bridge is enabled. It was observed that although the driver write the correct value (by sniffing on the I2C bus), the register has the wrong value. The datasheet states that the GPIO lines have to be stable for at least 5us after asserting the EN signal. Thus, there seems to be some logic which samples the GPIO lines and this logic appears to overwrite the register value which was set by the driver. Waiting 20us after asserting the EN line resolves this issue. Signed-off-by: Michael Walle --- I couldn't find a good commit for a Fixes: tag and I'm not sure how fixes are handled in drm. drivers/gpu/drm/bridge/ti-sn65dsi86.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 60224f476e1d..fcef43154558 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -386,6 +386,17 @@ static int __maybe_unused ti_sn65dsi86_resume(struct device *dev) gpiod_set_value_cansleep(pdata->enable_gpio, 1); + /* + * After EN is deasserted and an external clock is detected, the bridge + * will sample GPIO3:1 to determine its frequency. The driver will + * overwrite this setting. But this is racy. Thus we have to wait a + * couple of us. According to the datasheet the GPIO lines has to be + * stable at least 5 us (td5) but it seems that is not enough and the + * refclk frequency value is lost/overwritten by the bridge itself. + * Waiting for 20us seems to work. + */ + usleep_range(20, 30); + /* * If we have a reference clock we can enable communication w/ the * panel (including the aux channel) w/out any need for an input clock -- 2.39.5