From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BA6EC7EE30 for ; Wed, 25 Jun 2025 13:10:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C92DB10E700; Wed, 25 Jun 2025 13:10:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="TFGFEVs1"; dkim-atps=neutral Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by gabe.freedesktop.org (Postfix) with ESMTPS id 04CB810E70C; Wed, 25 Jun 2025 13:10:29 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 79D1B61786; Wed, 25 Jun 2025 13:10:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 686D2C4CEEA; Wed, 25 Jun 2025 13:10:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750857028; bh=bFXCEdgVhfDMEoqkGoje5SoT0Fo4NnjqAhltzIwdUUA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=TFGFEVs1itA8cp1o1GEbTnFCKfPv0xd+tYKJ5h86MYTxGlyUyN4Idtwk+T3bVHyFU nEU2lfDuUU4+sdETou3Vq0KGq95MRocUHXuAMebWtfhKY8CpjBaE1WsOnR46akJund M3PanMkdY04vMDRSkA4YFwSFIvXK5+y/xF5TjCoEpz/NTihEBnBxgK+j/BlcYlfBVy KCnY4x6VIUcF0wc7wqvrPuMYsPdkRRvz3paxaa3mojSd0dVgr6SEQvi58a9hpWD1o9 4cdtxfqlqVPlbapJHb6SsQIjL6hPeMaEicWiHDYGE36r2d6/ZSZwjxFI15ySTJk+rp /y9B+GQBZddfg== From: Konrad Dybcio Date: Wed, 25 Jun 2025 15:10:10 +0200 Subject: [PATCH v5 02/14] drm/msm: Offset MDSS HBB value by 13 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250625-topic-ubwc_central-v5-2-e256d18219e2@oss.qualcomm.com> References: <20250625-topic-ubwc_central-v5-0-e256d18219e2@oss.qualcomm.com> In-Reply-To: <20250625-topic-ubwc_central-v5-0-e256d18219e2@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Simona Vetter , Rob Clark , Abhinav Kumar , Jessica Zhang , Rob Clark , Akhil P Oommen Cc: Marijn Suijten , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1750857014; l=7622; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=T2FBWroU738HI/Pia2RKVHq+4tLpLcX1tOA/9NV0Bxg=; b=30+gbFk908d/HvMplBO4zGFPIgkGxPk+6x6LkyzVwaqJI/EtPWIEP4LLiLqnh4D8yVecIZOzy ZDulj8KOxDYCUiRnxehvrVB7bo5SbbtLsa6YVuo1QqctfgzaxX2m+Ku X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Konrad Dybcio The Adreno part of the driver exposes this value to userspace, and the SMEM data source also presents a x+13 value. Keep things coherent and make the value uniform across them. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/msm_mdss.c | 52 +++++++++++++++++++++--------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 422da5ebf802676afbfc5f242a5a84e6d488dda1..597c8e64985316763d7ced763c4c6fdb5da9fb90 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -167,7 +167,7 @@ static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss) { const struct msm_mdss_data *data = msm_mdss->mdss_data; u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle) | - MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit); + MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13); if (data->ubwc_bank_spread) value |= MDSS_UBWC_STATIC_UBWC_BANK_SPREAD; @@ -182,7 +182,7 @@ static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss) { const struct msm_mdss_data *data = msm_mdss->mdss_data; u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle & 0x1) | - MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit); + MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13); if (data->macrotile_mode) value |= MDSS_UBWC_STATIC_MACROTILE_MODE; @@ -200,7 +200,7 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss) { const struct msm_mdss_data *data = msm_mdss->mdss_data; u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle) | - MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit); + MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13); if (data->ubwc_bank_spread) value |= MDSS_UBWC_STATIC_UBWC_BANK_SPREAD; @@ -277,9 +277,9 @@ static const struct msm_mdss_data *msm_mdss_generate_mdp5_mdss_data(struct msm_m if (hw_rev == MDSS_HW_MSM8996 || hw_rev == MDSS_HW_MSM8998) - data->highest_bank_bit = 2; + data->highest_bank_bit = 15; else - data->highest_bank_bit = 1; + data->highest_bank_bit = 14; return data; } @@ -593,13 +593,13 @@ static void mdss_remove(struct platform_device *pdev) static const struct msm_mdss_data msm8998_data = { .ubwc_enc_version = UBWC_1_0, .ubwc_dec_version = UBWC_1_0, - .highest_bank_bit = 2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; static const struct msm_mdss_data qcm2290_data = { /* no UBWC */ - .highest_bank_bit = 0x2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; @@ -608,7 +608,7 @@ static const struct msm_mdss_data sa8775p_data = { .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 4, .ubwc_bank_spread = true, - .highest_bank_bit = 0, + .highest_bank_bit = 13, .macrotile_mode = true, .reg_bus_bw = 74000, }; @@ -618,7 +618,7 @@ static const struct msm_mdss_data sar2130p_data = { .ubwc_dec_version = UBWC_4_3, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 0, + .highest_bank_bit = 13, .macrotile_mode = 1, .reg_bus_bw = 74000, }; @@ -628,7 +628,7 @@ static const struct msm_mdss_data sc7180_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 0x1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; @@ -637,7 +637,7 @@ static const struct msm_mdss_data sc7280_data = { .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .macrotile_mode = true, .reg_bus_bw = 74000, }; @@ -645,7 +645,7 @@ static const struct msm_mdss_data sc7280_data = { static const struct msm_mdss_data sc8180x_data = { .ubwc_enc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 76800, }; @@ -655,7 +655,7 @@ static const struct msm_mdss_data sc8280xp_data = { .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 76800, }; @@ -663,14 +663,14 @@ static const struct msm_mdss_data sc8280xp_data = { static const struct msm_mdss_data sdm670_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; static const struct msm_mdss_data sdm845_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; @@ -679,21 +679,21 @@ static const struct msm_mdss_data sm6350_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; static const struct msm_mdss_data sm7150_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; static const struct msm_mdss_data sm8150_data = { .ubwc_enc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, - .highest_bank_bit = 2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; @@ -702,7 +702,7 @@ static const struct msm_mdss_data sm6115_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 7, .ubwc_bank_spread = true, - .highest_bank_bit = 0x1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; @@ -710,13 +710,13 @@ static const struct msm_mdss_data sm6125_data = { .ubwc_enc_version = UBWC_1_0, .ubwc_dec_version = UBWC_3_0, .ubwc_swizzle = 1, - .highest_bank_bit = 1, + .highest_bank_bit = 14, }; static const struct msm_mdss_data sm6150_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; @@ -726,7 +726,7 @@ static const struct msm_mdss_data sm8250_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 76800, }; @@ -737,7 +737,7 @@ static const struct msm_mdss_data sm8350_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 74000, }; @@ -748,7 +748,7 @@ static const struct msm_mdss_data sm8550_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 57000, }; @@ -759,7 +759,7 @@ static const struct msm_mdss_data sm8750_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 57000, }; @@ -770,7 +770,7 @@ static const struct msm_mdss_data x1e80100_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, /* TODO: Add reg_bus_bw with real value */ }; -- 2.50.0