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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com,
	pekka.paalanen@collabora.com, contact@emersion.fr,
	harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com,
	sebastian.wick@redhat.com, shashank.sharma@amd.com,
	swati2.sharma@intel.com, alex.hung@amd.com,
	Uma Shankar <uma.shankar@intel.com>
Subject: [v5 03/24] drm: Add Color ops capability property
Date: Wed,  2 Jul 2025 14:49:15 +0530	[thread overview]
Message-ID: <20250702091936.3004854-4-uma.shankar@intel.com> (raw)
In-Reply-To: <20250702091936.3004854-1-uma.shankar@intel.com>

Add capability property which a colorop can expose it's
hardware's abilities. It's a blob property that can be
filled with respective data structures depending on the
colorop. The user space is expected to read this property
and program the colorop accordingly.

v2: Added documentation for hw_caps blob (Dmitry)

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
 drivers/gpu/drm/drm_atomic_uapi.c |  3 +++
 include/drm/drm_colorop.h         | 17 +++++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 3a9dc98d7653..81a8da09fbfe 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -785,6 +785,9 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
 		*val = colorop->lut3d_interpolation;
 	} else if (property == colorop->data_property) {
 		*val = (state->data) ? state->data->base.id : 0;
+	} else if (property == colorop->hw_caps_property) {
+		*val = state->hw_caps ?
+			state->hw_caps->base.id : 0;
 	} else {
 		return -EINVAL;
 	}
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index d5aebe46970f..46099e81bbfa 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -155,6 +155,16 @@ struct drm_colorop_state {
 	 */
 	uint64_t multiplier;
 
+	/**
+	 * @hw_caps:
+	 *
+	 * This blob will be of type struct drm_color_lut_range which contains the
+	 * hardware capabilities of 1D LUT. These include number of LUT segments,
+	 * number of LUT samples per segment, start and end point of respective
+	 * segments and the precision of the LUT sample along with the normalization factor
+	 */
+	struct drm_property_blob *hw_caps;
+
 	/**
 	 * @data:
 	 *
@@ -305,6 +315,13 @@ struct drm_colorop {
 	 */
 	struct drm_property *curve_1d_type_property;
 
+	/**
+	 * @hw_caps_property:
+	 *
+	 * Property to expose hardware lut capabilities.
+	 */
+	struct drm_property *hw_caps_property;
+
 	/**
 	 * @multiplier_property:
 	 *
-- 
2.42.0


  parent reply	other threads:[~2025-07-02  9:07 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-02  9:19 [v5 00/24] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-07-02  9:19 ` [v5 01/24] [NOT FOR REVIEW] drm: AMD series squashed Uma Shankar
2025-07-02  9:19 ` [v5 02/24] drm: Add Color lut range attributes Uma Shankar
2025-10-23  5:25   ` Kandpal, Suraj
2025-07-02  9:19 ` Uma Shankar [this message]
2025-10-28  5:31   ` [v5 03/24] drm: Add Color ops capability property Kandpal, Suraj
2025-07-02  9:19 ` [v5 04/24] drm: Add 1D LUT multi-segmented color op Uma Shankar
2025-10-23  8:11   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 05/24] drm: Define helper to initialize segmented 1D LUT Uma Shankar
2025-10-23  8:27   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 06/24] drm: Add helper to extract lut from struct drm_color_lut_32 Uma Shankar
2025-10-24  4:29   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 07/24] drm/i915: Add identifiers for intel color blocks Uma Shankar
2025-07-04 12:35   ` Jani Nikula
2025-10-23  6:04   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 08/24] drm/i915: Add intel_color_op Uma Shankar
2025-07-04 12:36   ` Jani Nikula
2025-11-05 12:24     ` Borah, Chaitanya Kumar
2025-07-02  9:19 ` [v5 09/24] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-07-04 12:37   ` Jani Nikula
2025-10-27  9:38   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 10/24] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-07-04 12:39   ` Jani Nikula
2025-10-28  4:59   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 11/24] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
2025-07-04 12:41   ` Jani Nikula
2025-10-28  5:13   ` Kandpal, Suraj
2025-11-05 12:25     ` Borah, Chaitanya Kumar
2025-07-02  9:19 ` [v5 12/24] drm/i915/color: Add framework to program CSC Uma Shankar
2025-10-28  8:09   ` Kandpal, Suraj
2025-10-28  8:12     ` Kandpal, Suraj
2025-11-05 12:25       ` Borah, Chaitanya Kumar
2025-11-05 12:25     ` Borah, Chaitanya Kumar
2025-07-02  9:19 ` [v5 13/24] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
2025-07-04 12:42   ` Jani Nikula
2025-07-02  9:19 ` [v5 14/24] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
2025-07-02  9:19 ` [v5 15/24] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-07-02  9:19 ` [v5 16/24] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
2025-10-28  8:16   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 17/24] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-10-23  6:22   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 18/24] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-07-02  9:19 ` [v5 19/24] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-10-23  6:25   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 20/24] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-10-23  6:28   ` Kandpal, Suraj
2025-11-05 12:26     ` Borah, Chaitanya Kumar
2025-10-28  8:25   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 21/24] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-10-28  8:29   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 22/24] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-07-02  9:19 ` [v5 23/24] drm/i915/color: Create color pipeline with multisegmented LUT Uma Shankar
2025-10-28  8:31   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 24/24] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar

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