* [PATCH v8 1/9] dt-bindings: display/msm: dp-controller: allow eDP for SA8775P
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 2/9] dt-bindings: display/msm: dp-controller: fix fallback for SM6350 Dmitry Baryshkov
` (7 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
On Qualcomm SA8775P the DP controller might be driving either a
DisplayPort or a eDP sink (depending on the PHY that is tied to the
controller). Reflect that in the schema.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
.../bindings/display/msm/dp-controller.yaml | 25 ++++++++++++++++------
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 9923b065323bbab99de5079b674a0317f3074373..aed3bafa67e3c24d2a876acd29660378b367603a 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -174,12 +174,25 @@ allOf:
properties:
"#sound-dai-cells": false
else:
- properties:
- aux-bus: false
- reg:
- minItems: 5
- required:
- - "#sound-dai-cells"
+ if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sa8775p-dp
+ then:
+ oneOf:
+ - required:
+ - aux-bus
+ - required:
+ - "#sound-dai-cells"
+ else:
+ properties:
+ aux-bus: false
+ reg:
+ minItems: 5
+ required:
+ - "#sound-dai-cells"
additionalProperties: false
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v8 2/9] dt-bindings: display/msm: dp-controller: fix fallback for SM6350
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 1/9] dt-bindings: display/msm: dp-controller: allow eDP for SA8775P Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 22:09 ` Rob Herring (Arm)
2025-09-03 11:58 ` [PATCH v8 3/9] dt-bindings: display/msm: dp-controller: document DP on SM7150 Dmitry Baryshkov
` (6 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
Currently SM6350 uses qcom,sm8350-dp as a fallback compatible entry.
This works, but adding DP MST support will reveal that this SoC is
not fully compatible with SM8350 platform: the former one doesn't
provide MST support, while the latter one will get it. DT schema for
SM8350 is going to demand MST-related clocks which SM6350 doesn't
provide.
Add new entry for SM6350 with fallback to SC7180 (which belongs to the
same generation and also doesn't have MST support). SC7180 has been
supported by the Linux kernel long ago (and long before SM8350 support
was added).
Fixes: 39086151593a ("dt-bindings: display: msm: dp-controller: document SM6350 compatible")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index aed3bafa67e3c24d2a876acd29660378b367603a..0f814aa6f51406fdbdd7386027f88dfbacb24392 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -31,13 +31,25 @@ properties:
- qcom,sm8650-dp
- items:
- enum:
- - qcom,sar2130p-dp
- qcom,sm6350-dp
+ - const: qcom,sc7180-dp
+
+ # deprecated entry for compatibility with old DT
+ - items:
+ - enum:
+ - qcom,sm6350-dp
+ - const: qcom,sm8350-dp
+ deprecated: true
+
+ - items:
+ - enum:
+ - qcom,sar2130p-dp
- qcom,sm8150-dp
- qcom,sm8250-dp
- qcom,sm8450-dp
- qcom,sm8550-dp
- const: qcom,sm8350-dp
+
- items:
- enum:
- qcom,sm8750-dp
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v8 2/9] dt-bindings: display/msm: dp-controller: fix fallback for SM6350
2025-09-03 11:58 ` [PATCH v8 2/9] dt-bindings: display/msm: dp-controller: fix fallback for SM6350 Dmitry Baryshkov
@ 2025-09-03 22:09 ` Rob Herring (Arm)
0 siblings, 0 replies; 17+ messages in thread
From: Rob Herring (Arm) @ 2025-09-03 22:09 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Marijn Suijten, Sean Paul, Thomas Zimmermann, Abel Vesa,
linux-kernel, Rob Clark, Abhinav Kumar, linux-arm-msm,
Krzysztof Kozlowski, Conor Dooley, dri-devel, freedreno,
Krzysztof Kozlowski, Bjorn Andersson, Maxime Ripard, devicetree,
David Airlie, Kuogee Hsieh, Maarten Lankhorst, Mahadevan,
Konrad Dybcio, Simona Vetter, Jessica Zhang, Dmitry Baryshkov
On Wed, 03 Sep 2025 14:58:13 +0300, Dmitry Baryshkov wrote:
> Currently SM6350 uses qcom,sm8350-dp as a fallback compatible entry.
> This works, but adding DP MST support will reveal that this SoC is
> not fully compatible with SM8350 platform: the former one doesn't
> provide MST support, while the latter one will get it. DT schema for
> SM8350 is going to demand MST-related clocks which SM6350 doesn't
> provide.
>
> Add new entry for SM6350 with fallback to SC7180 (which belongs to the
> same generation and also doesn't have MST support). SC7180 has been
> supported by the Linux kernel long ago (and long before SM8350 support
> was added).
>
> Fixes: 39086151593a ("dt-bindings: display: msm: dp-controller: document SM6350 compatible")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v8 3/9] dt-bindings: display/msm: dp-controller: document DP on SM7150
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 1/9] dt-bindings: display/msm: dp-controller: allow eDP for SA8775P Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 2/9] dt-bindings: display/msm: dp-controller: fix fallback for SM6350 Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 22:12 ` Rob Herring (Arm)
2025-09-03 11:58 ` [PATCH v8 4/9] dt-bindings: display/msm: qcom,x1e80100-mdss: correct DP addresses Dmitry Baryshkov
` (5 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
The qcom,sm7150-dp compatible is documented in schema. Mark DisplayPort
controller as compatible with SM8350.
Fixes: 726eded12dd7 ("dt-bindings: display/msm: Add SM7150 MDSS")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml | 6 ++++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 0f814aa6f51406fdbdd7386027f88dfbacb24392..a18183f7ec21ac0d09fecb86e8e77e3e4fffec12 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -44,6 +44,7 @@ properties:
- items:
- enum:
- qcom,sar2130p-dp
+ - qcom,sm7150-dp
- qcom,sm8150-dp
- qcom,sm8250-dp
- qcom,sm8450-dp
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml
index 13c5d5ffabde9b0fc5af11aad1fcee860939c66f..c5d209019124da3127285f61bf5a27d346a3d8a1 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml
@@ -61,7 +61,8 @@ patternProperties:
additionalProperties: true
properties:
compatible:
- const: qcom,sm7150-dp
+ contains:
+ const: qcom,sm7150-dp
"^dsi@[0-9a-f]+$":
type: object
@@ -378,7 +379,8 @@ examples:
};
displayport-controller@ae90000 {
- compatible = "qcom,sm7150-dp";
+ compatible = "qcom,sm7150-dp",
+ "qcom,sm8350-dp";
reg = <0xae90000 0x200>,
<0xae90200 0x200>,
<0xae90400 0xc00>,
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v8 3/9] dt-bindings: display/msm: dp-controller: document DP on SM7150
2025-09-03 11:58 ` [PATCH v8 3/9] dt-bindings: display/msm: dp-controller: document DP on SM7150 Dmitry Baryshkov
@ 2025-09-03 22:12 ` Rob Herring (Arm)
0 siblings, 0 replies; 17+ messages in thread
From: Rob Herring (Arm) @ 2025-09-03 22:12 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: freedreno, Bjorn Andersson, devicetree, linux-kernel, Sean Paul,
Dmitry Baryshkov, Simona Vetter, dri-devel, Krzysztof Kozlowski,
Thomas Zimmermann, Conor Dooley, Marijn Suijten, linux-arm-msm,
Krzysztof Kozlowski, Abel Vesa, David Airlie, Mahadevan,
Maarten Lankhorst, Abhinav Kumar, Rob Clark, Konrad Dybcio,
Jessica Zhang, Kuogee Hsieh, Maxime Ripard
On Wed, 03 Sep 2025 14:58:14 +0300, Dmitry Baryshkov wrote:
> The qcom,sm7150-dp compatible is documented in schema. Mark DisplayPort
> controller as compatible with SM8350.
>
> Fixes: 726eded12dd7 ("dt-bindings: display/msm: Add SM7150 MDSS")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
> Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml | 6 ++++--
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v8 4/9] dt-bindings: display/msm: qcom,x1e80100-mdss: correct DP addresses
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
` (2 preceding siblings ...)
2025-09-03 11:58 ` [PATCH v8 3/9] dt-bindings: display/msm: dp-controller: document DP on SM7150 Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 5/9] dt-bindings: display/msm: dp-controller: add X1E80100 Dmitry Baryshkov
` (4 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski, Abhinav Kumar
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
Fix c&p error and correct example to use 32-bit addressing (as the rest
of the example DT does) instead of 64-bit (as the platform does). It
got unnoticed before since DP controller node wasn't validated against
DT schema because of the missing compatible.
Fixes: 81de267367d4 ("dt-bindings: display/msm: Document MDSS on X1E80100")
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
.../devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml
index 3b01a0e473332c331be36f7983fb8012652a8412..e35230a864379c195600ff67820d6a39b6f73ef4 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml
@@ -170,11 +170,11 @@ examples:
displayport-controller@ae90000 {
compatible = "qcom,x1e80100-dp";
- reg = <0 0xae90000 0 0x200>,
- <0 0xae90200 0 0x200>,
- <0 0xae90400 0 0x600>,
- <0 0xae91000 0 0x400>,
- <0 0xae91400 0 0x400>;
+ reg = <0xae90000 0x200>,
+ <0xae90200 0x200>,
+ <0xae90400 0x600>,
+ <0xae91000 0x400>,
+ <0xae91400 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v8 5/9] dt-bindings: display/msm: dp-controller: add X1E80100
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
` (3 preceding siblings ...)
2025-09-03 11:58 ` [PATCH v8 4/9] dt-bindings: display/msm: qcom,x1e80100-mdss: correct DP addresses Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 6/9] dt-bindings: display/msm: drop assigned-clock-parents for dp controller Dmitry Baryshkov
` (3 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski, Abhinav Kumar
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
Add X1E80100 to the dp-controller bindings, it has DisplayPort
controller similar to other platforms, but it uses its own compatible
string.
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index a18183f7ec21ac0d09fecb86e8e77e3e4fffec12..6316c929fd66588b83d3abaf01d83a6b49b35e80 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -29,6 +29,8 @@ properties:
- qcom,sdm845-dp
- qcom,sm8350-dp
- qcom,sm8650-dp
+ - qcom,x1e80100-dp
+
- items:
- enum:
- qcom,sm6350-dp
@@ -193,6 +195,7 @@ allOf:
contains:
enum:
- qcom,sa8775p-dp
+ - qcom,x1e80100-dp
then:
oneOf:
- required:
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v8 6/9] dt-bindings: display/msm: drop assigned-clock-parents for dp controller
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
` (4 preceding siblings ...)
2025-09-03 11:58 ` [PATCH v8 5/9] dt-bindings: display/msm: dp-controller: add X1E80100 Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 7/9] dt-bindings: display/msm: expand to support MST Dmitry Baryshkov
` (2 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski, Abhinav Kumar, Krzysztof Kozlowski
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
DP controller schema documents assigned-clocks and
assigned-clock-parents. However these assignments should not be a part
of the ABI: there are no actual requirements on the order of the
assignments, MST cases require different number of clocks to be
assigned, etc.
Instead of fixing up the documentation, drop the assigned-clock-parents
and assigned-clocks from the bindings. The generic clock/clock.yaml
already covers these properties.
Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 6316c929fd66588b83d3abaf01d83a6b49b35e80..afe01332d66c3c2e6e5848ce3d864079ce71f3cd 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -86,16 +86,6 @@ properties:
- const: ctrl_link_iface
- const: stream_pixel
- assigned-clocks:
- items:
- - description: link clock source
- - description: pixel clock source
-
- assigned-clock-parents:
- items:
- - description: phy 0 parent
- - description: phy 1 parent
-
phys:
maxItems: 1
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v8 7/9] dt-bindings: display/msm: expand to support MST
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
` (5 preceding siblings ...)
2025-09-03 11:58 ` [PATCH v8 6/9] dt-bindings: display/msm: drop assigned-clock-parents for dp controller Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 22:13 ` Rob Herring (Arm)
2025-09-03 11:58 ` [PATCH v8 8/9] arm64: dts: qcom: sm6350: correct DP compatibility strings Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport Dmitry Baryshkov
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski, Abhinav Kumar
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
On a vast majority of Qualcomm chipsets DisplayPort controller can
support several MST streams (up to 4x). To support MST these chipsets
use up to 4 stream pixel clocks for the DisplayPort controller and
several extra register regions. Expand corresponding region and clock
bindings for these platforms and fix example schema files to follow
updated bindings.
Note: On chipsets that support MST, the number of streams supported
can vary between controllers. For example, SA8775P supports 4 MST
streams on mdss_dp0 but only 2 streams on mdss_dp1.
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
.../bindings/display/msm/dp-controller.yaml | 103 ++++++++++++++++++++-
.../bindings/display/msm/qcom,sa8775p-mdss.yaml | 26 +++++-
.../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 +-
.../bindings/display/msm/qcom,sc7280-mdss.yaml | 3 +-
.../bindings/display/msm/qcom,sm7150-mdss.yaml | 10 +-
.../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 +-
.../bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 +-
7 files changed, 150 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index afe01332d66c3c2e6e5848ce3d864079ce71f3cd..aeb4e4f36044a0ff1e78ad47b867e232b21df509 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -66,25 +66,37 @@ properties:
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: p2 register block
+ - description: p3 register block
+ - description: mst2link register block
+ - description: mst3link register block
interrupts:
maxItems: 1
clocks:
+ minItems: 5
items:
- description: AHB clock to enable register access
- description: Display Port AUX clock
- description: Display Port Link clock
- description: Link interface clock between DP and PHY
- - description: Display Port Pixel clock
+ - description: Display Port stream 0 Pixel clock
+ - description: Display Port stream 1 Pixel clock
+ - description: Display Port stream 2 Pixel clock
+ - description: Display Port stream 3 Pixel clock
clock-names:
+ minItems: 5
items:
- const: core_iface
- const: core_aux
- const: ctrl_link
- const: ctrl_link_iface
- const: stream_pixel
+ - const: stream_1_pixel
+ - const: stream_2_pixel
+ - const: stream_3_pixel
phys:
maxItems: 1
@@ -166,7 +178,6 @@ required:
allOf:
# AUX BUS does not exist on DP controllers
# Audio output also is present only on DP output
- # p1 regions is present on DP, but not on eDP
- if:
properties:
compatible:
@@ -195,11 +206,95 @@ allOf:
else:
properties:
aux-bus: false
- reg:
- minItems: 5
required:
- "#sound-dai-cells"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ # these platforms support SST only
+ - qcom,sc7180-dp
+ - qcom,sc7280-dp
+ - qcom,sc7280-edp
+ - qcom,sc8180x-edp
+ - qcom,sc8280xp-edp
+ then:
+ properties:
+ reg:
+ minItems: 5
+ maxItems: 5
+ clocks:
+ minItems: 5
+ maxItems: 5
+ clocks-names:
+ minItems: 5
+ maxItems: 5
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ # these platforms support 2 streams MST on some interfaces,
+ # others are SST only
+ - qcom,sc8280xp-dp
+ - qcom,x1e80100-dp
+ then:
+ properties:
+ reg:
+ minItems: 5
+ maxItems: 5
+ clocks:
+ minItems: 5
+ maxItems: 6
+ clocks-names:
+ minItems: 5
+ maxItems: 6
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ # 2 streams MST
+ enum:
+ - qcom,sc8180x-dp
+ - qcom,sdm845-dp
+ - qcom,sm8350-dp
+ - qcom,sm8650-dp
+ then:
+ properties:
+ reg:
+ minItems: 5
+ maxItems: 5
+ clocks:
+ minItems: 6
+ maxItems: 6
+ clocks-names:
+ minItems: 6
+ maxItems: 6
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ # these platforms support 4 stream MST on first DP,
+ # 2 streams MST on the second one.
+ - qcom,sa8775p-dp
+ then:
+ properties:
+ reg:
+ minItems: 9
+ maxItems: 9
+ clocks:
+ minItems: 6
+ maxItems: 8
+ clocks-names:
+ minItems: 6
+ maxItems: 8
+
additionalProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml
index 1053b3bc49086185d17c7c18d56fb4caf98c2eda..e2730a2f25cfb0496f47ad9f3f9cbf69b1d4649f 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml
@@ -375,7 +375,11 @@ examples:
<0xaf54200 0x0c0>,
<0xaf55000 0x770>,
<0xaf56000 0x09c>,
- <0xaf57000 0x09c>;
+ <0xaf57000 0x09c>,
+ <0xaf58000 0x09c>,
+ <0xaf59000 0x09c>,
+ <0xaf5a000 0x23c>,
+ <0xaf5b000 0x23c>;
interrupt-parent = <&mdss0>;
interrupts = <12>;
@@ -384,16 +388,28 @@ examples:
<&dispcc_dptx0_aux_clk>,
<&dispcc_dptx0_link_clk>,
<&dispcc_dptx0_link_intf_clk>,
- <&dispcc_dptx0_pixel0_clk>;
+ <&dispcc_dptx0_pixel0_clk>,
+ <&dispcc_dptx0_pixel1_clk>,
+ <&dispcc_dptx0_pixel2_clk>,
+ <&dispcc_dptx0_pixel3_clk>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel",
+ "stream_2_pixel",
+ "stream_3_pixel";
assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>,
- <&dispcc_mdss_dptx0_pixel0_clk_src>;
- assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>;
+ <&dispcc_mdss_dptx0_pixel0_clk_src>,
+ <&dispcc_mdss_dptx0_pixel1_clk_src>,
+ <&dispcc_mdss_dptx0_pixel2_clk_src>,
+ <&dispcc_mdss_dptx0_pixel3_clk_src>;
+ assigned-clock-parents = <&mdss0_dp0_phy 0>,
+ <&mdss0_dp0_phy 1>,
+ <&mdss0_dp0_phy 1>,
+ <&mdss0_dp0_phy 1>;
phys = <&mdss0_dp0_phy>;
phy-names = "dp";
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml
index 870144b53cec9d3e0892276e14b49b745d021879..44c1bb9e41094197b2a6855c0d992fda8c1240a4 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml
@@ -207,16 +207,20 @@ examples:
<&dispcc_disp_cc_mdss_dptx0_aux_clk>,
<&dispcc_disp_cc_mdss_dptx0_link_clk>,
<&dispcc_disp_cc_mdss_dptx0_link_intf_clk>,
- <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>;
+ <&dispcc_disp_cc_mdss_dptx0_pixel0_clk>,
+ <&dispcc_disp_cc_mdss_dptx0_pixel1_clk>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc_disp_cc_mdss_dptx0_link_clk_src>,
- <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>;
+ <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>,
+ <&dispcc_disp_cc_mdss_dptx0_pixel1_clk_src>;
assigned-clock-parents = <&usb_dp_qmpphy_QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>;
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
index 2947f27e0585216ca0e1eab6a79afcb21323b201..b643d3adf66947095490b51625a03635c64c37c2 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
@@ -281,7 +281,8 @@ examples:
reg = <0xaea0000 0x200>,
<0xaea0200 0x200>,
<0xaea0400 0xc00>,
- <0xaea1000 0x400>;
+ <0xaea1000 0x400>,
+ <0xaea1400 0x400>;
interrupt-parent = <&mdss>;
interrupts = <14>;
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml
index c5d209019124da3127285f61bf5a27d346a3d8a1..9b0621d88d508fb441f004261c42c2473bea2bcb 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml
@@ -394,16 +394,20 @@ examples:
<&dispcc_mdss_dp_aux_clk>,
<&dispcc_mdss_dp_link_clk>,
<&dispcc_mdss_dp_link_intf_clk>,
- <&dispcc_mdss_dp_pixel_clk>;
+ <&dispcc_mdss_dp_pixel_clk>,
+ <&dispcc_mdss_dp_pixel1_clk>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc_mdss_dp_link_clk_src>,
- <&dispcc_mdss_dp_pixel_clk_src>;
+ <&dispcc_mdss_dp_pixel_clk_src>,
+ <&dispcc_mdss_dp_pixel1_clk_src>;
assigned-clock-parents = <&dp_phy 0>,
+ <&dp_phy 1>,
<&dp_phy 1>;
operating-points-v2 = <&dp_opp_table>;
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml
index 72c70edc1fb01c61f8aad24fdb58bfb4f62a6e34..4151f475f3bc36a584493722db207a3dd5f96eed 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml
@@ -401,16 +401,20 @@ examples:
<&disp_cc_mdss_dptx0_aux_clk>,
<&disp_cc_mdss_dptx0_link_clk>,
<&disp_cc_mdss_dptx0_link_intf_clk>,
- <&disp_cc_mdss_dptx0_pixel0_clk>;
+ <&disp_cc_mdss_dptx0_pixel0_clk>,
+ <&disp_cc_mdss_dptx0_pixel1_clk>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&disp_cc_mdss_dptx0_link_clk_src>,
- <&disp_cc_mdss_dptx0_pixel0_clk_src>;
+ <&disp_cc_mdss_dptx0_pixel0_clk_src>,
+ <&disp_cc_mdss_dptx0_pixel1_clk_src>;
assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
operating-points-v2 = <&dp_opp_table>;
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml
index e35230a864379c195600ff67820d6a39b6f73ef4..8d698a2e055a88b6485606d9708e488e6bc82341 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,x1e80100-mdss.yaml
@@ -183,15 +183,19 @@ examples:
<&dispcc_dptx0_aux_clk>,
<&dispcc_dptx0_link_clk>,
<&dispcc_dptx0_link_intf_clk>,
- <&dispcc_dptx0_pixel0_clk>;
+ <&dispcc_dptx0_pixel0_clk>,
+ <&dispcc_dptx0_pixel1_clk>;
clock-names = "core_iface", "core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>,
- <&dispcc_mdss_dptx0_pixel0_clk_src>;
+ <&dispcc_mdss_dptx0_pixel0_clk_src>,
+ <&dispcc_mdss_dptx0_pixel1_clk_src>;
assigned-clock-parents = <&usb_1_ss0_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
operating-points-v2 = <&mdss_dp0_opp_table>;
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v8 7/9] dt-bindings: display/msm: expand to support MST
2025-09-03 11:58 ` [PATCH v8 7/9] dt-bindings: display/msm: expand to support MST Dmitry Baryshkov
@ 2025-09-03 22:13 ` Rob Herring (Arm)
0 siblings, 0 replies; 17+ messages in thread
From: Rob Herring (Arm) @ 2025-09-03 22:13 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: linux-arm-msm, Thomas Zimmermann, Maarten Lankhorst,
Krzysztof Kozlowski, Jessica Zhang, Abhinav Kumar, David Airlie,
Abhinav Kumar, Bjorn Andersson, Sean Paul, Marijn Suijten,
freedreno, Mahadevan, Maxime Ripard, Conor Dooley, Kuogee Hsieh,
Konrad Dybcio, linux-kernel, dri-devel, Rob Clark,
Dmitry Baryshkov, Abel Vesa, Simona Vetter, devicetree,
Krzysztof Kozlowski
On Wed, 03 Sep 2025 14:58:18 +0300, Dmitry Baryshkov wrote:
> From: Abhinav Kumar <quic_abhinavk@quicinc.com>
>
> On a vast majority of Qualcomm chipsets DisplayPort controller can
> support several MST streams (up to 4x). To support MST these chipsets
> use up to 4 stream pixel clocks for the DisplayPort controller and
> several extra register regions. Expand corresponding region and clock
> bindings for these platforms and fix example schema files to follow
> updated bindings.
>
> Note: On chipsets that support MST, the number of streams supported
> can vary between controllers. For example, SA8775P supports 4 MST
> streams on mdss_dp0 but only 2 streams on mdss_dp1.
>
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> .../bindings/display/msm/dp-controller.yaml | 103 ++++++++++++++++++++-
> .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 26 +++++-
> .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 +-
> .../bindings/display/msm/qcom,sc7280-mdss.yaml | 3 +-
> .../bindings/display/msm/qcom,sm7150-mdss.yaml | 10 +-
> .../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 +-
> .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 +-
> 7 files changed, 150 insertions(+), 22 deletions(-)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v8 8/9] arm64: dts: qcom: sm6350: correct DP compatibility strings
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
` (6 preceding siblings ...)
2025-09-03 11:58 ` [PATCH v8 7/9] dt-bindings: display/msm: expand to support MST Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 11:58 ` [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport Dmitry Baryshkov
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
SM6350 doesn't have MST support, as such in DT schema it has been
switched to use SC7180 as a fallback compatible. Make DT file implement
this change. DisplayPort on SC7180 has been supported long ago (and long
before we added support for DP on SM8350). The driver will continue to
work with the old DTS (having qcom,sm8350-dp fallback compatible) as
even after adding MST support the driver will have to support old SM8350
DTS which didn't have MST clocks.
Fixes: 62f87a3cac4e ("arm64: dts: qcom: sm6350: Add DisplayPort controller")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 2493b9611dcb675f4c33794ecc0ee9e8823e24d4..8459b27cacc72a4827a2e289e669163ad6250059 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2249,7 +2249,7 @@ opp-560000000 {
};
mdss_dp: displayport-controller@ae90000 {
- compatible = "qcom,sm6350-dp", "qcom,sm8350-dp";
+ compatible = "qcom,sm6350-dp", "qcom,sc7180-dp";
reg = <0x0 0xae90000 0x0 0x200>,
<0x0 0xae90200 0x0 0x200>,
<0x0 0xae90400 0x0 0x600>,
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport
2025-09-03 11:58 [PATCH v8 0/9] dt-bindings: msm/dp: Add support for 4 pixel streams Dmitry Baryshkov
` (7 preceding siblings ...)
2025-09-03 11:58 ` [PATCH v8 8/9] arm64: dts: qcom: sm6350: correct DP compatibility strings Dmitry Baryshkov
@ 2025-09-03 11:58 ` Dmitry Baryshkov
2025-09-03 13:41 ` Konrad Dybcio
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 11:58 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
From: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Update Qualcomm DT files in order to declare extra stream pixel clocks
and extra register resources used on these platforms to support
DisplayPort MST.
The driver will continue to work with the old DTS files as even after
adding MST support the driver will have to support old DTS files which
didn't have MST clocks.
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 46 +++++++++++++++++-----
arch/arm64/boot/dts/qcom/sar2130p.dtsi | 10 +++--
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +-
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 23 +++++++----
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 72 +++++++++++++++++++++++-----------
arch/arm64/boot/dts/qcom/sdm845.dtsi | 15 +++++--
arch/arm64/boot/dts/qcom/sm8150.dtsi | 10 +++--
arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 +++--
arch/arm64/boot/dts/qcom/sm8350.dtsi | 10 +++--
arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 +++--
arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 +++--
arch/arm64/boot/dts/qcom/sm8650.dtsi | 10 +++--
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 +++++++++-----
13 files changed, 185 insertions(+), 74 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 64f5378c6a4770cee2c7d76cde1098d7df17a24a..a1e033089860504844727fd9cd887f0808de1607 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -4694,7 +4694,11 @@ mdss0_dp0: displayport-controller@af54000 {
<0x0 0x0af54200 0x0 0x0c0>,
<0x0 0x0af55000 0x0 0x770>,
<0x0 0x0af56000 0x0 0x09c>,
- <0x0 0x0af57000 0x0 0x09c>;
+ <0x0 0x0af57000 0x0 0x09c>,
+ <0x0 0x0af58000 0x0 0x09c>,
+ <0x0 0x0af59000 0x0 0x09c>,
+ <0x0 0x0af5a000 0x0 0x23c>,
+ <0x0 0x0af5b000 0x0 0x23c>;
interrupt-parent = <&mdss0>;
interrupts = <12>;
@@ -4703,15 +4707,28 @@ mdss0_dp0: displayport-controller@af54000 {
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel",
+ "stream_2_pixel",
+ "stream_3_pixel";
assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
- assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>;
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK_SRC>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK_SRC>;
+ assigned-clock-parents = <&mdss0_dp0_phy 0>,
+ <&mdss0_dp0_phy 1>,
+ <&mdss0_dp0_phy 1>,
+ <&mdss0_dp0_phy 1>,
+ <&mdss0_dp0_phy 1>;
phys = <&mdss0_dp0_phy>;
phy-names = "dp";
@@ -4773,7 +4790,11 @@ mdss0_dp1: displayport-controller@af5c000 {
<0x0 0x0af5c200 0x0 0x0c0>,
<0x0 0x0af5d000 0x0 0x770>,
<0x0 0x0af5e000 0x0 0x09c>,
- <0x0 0x0af5f000 0x0 0x09c>;
+ <0x0 0x0af5f000 0x0 0x09c>,
+ <0x0 0x0af60000 0x0 0x09c>,
+ <0x0 0x0af61000 0x0 0x09c>,
+ <0x0 0x0af62000 0x0 0x23c>,
+ <0x0 0x0af63000 0x0 0x23c>;
interrupt-parent = <&mdss0>;
interrupts = <13>;
@@ -4782,15 +4803,20 @@ mdss0_dp1: displayport-controller@af5c000 {
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_AUX_CLK>,
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_CLK>,
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
- <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
- <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
- assigned-clock-parents = <&mdss0_dp1_phy 0>, <&mdss0_dp1_phy 1>;
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
+ assigned-clock-parents = <&mdss0_dp1_phy 0>,
+ <&mdss0_dp1_phy 1>,
+ <&mdss0_dp1_phy 1>;
phys = <&mdss0_dp1_phy>;
phy-names = "dp";
diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
index 38f7869616ff01ece3799ced15c39375d629e364..62bd535d7f14bed10fae329b20ac97cb63f3761b 100644
--- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
@@ -2144,16 +2144,20 @@ mdss_dp0: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 0dd6a5c91d109c78333f6b90104fa51fcf3bd64c..375e890f02c7d1cb06845293f17deb6ec45f9c5a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -5047,7 +5047,8 @@ mdss_edp: edp@aea0000 {
reg = <0 0x0aea0000 0 0x200>,
<0 0x0aea0200 0 0x200>,
<0 0x0aea0400 0 0xc00>,
- <0 0x0aea1000 0 0x400>;
+ <0 0x0aea1000 0 0x400>,
+ <0 0x0aea1400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <14>;
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 70c87c79e1325f4ab4c81f34e99c0b52be4b3810..e6a7248040095077d6f98d632f4e8a1868432445 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3241,16 +3241,20 @@ mdss_dp0: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_prim_qmpphy QMP_USB43DP_DP_PHY>;
@@ -3319,16 +3323,20 @@ mdss_dp1: displayport-controller@ae98000 {
<&dispcc DISP_CC_MDSS_DP_AUX1_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK1_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK1_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK1_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_sec_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_sec_qmpphy QMP_USB43DP_DP_PHY>;
@@ -3389,7 +3397,8 @@ mdss_edp: displayport-controller@ae9a000 {
reg = <0 0xae9a000 0 0x200>,
<0 0xae9a200 0 0x200>,
<0 0xae9a400 0 0x600>,
- <0 0xae9aa00 0 0x400>;
+ <0 0xae9aa00 0 0x400>,
+ <0 0xae9b000 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <14>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 421693208af0d5baeaa14ba2bbf29cbbc677e732..ad04868763d00221ed9939c76132977b83762cd7 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -4338,15 +4338,19 @@ mdss0_dp0: displayport-controller@ae90000 {
<&dispcc0 DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc0 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface", "core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_0_qmpphy QMP_USB43DP_DP_PHY>;
@@ -4417,14 +4421,18 @@ mdss0_dp1: displayport-controller@ae98000 {
<&dispcc0 DISP_CC_MDSS_DPTX1_AUX_CLK>,
<&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK>,
<&dispcc0 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
- <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+ <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
clock-names = "core_iface", "core_aux",
"ctrl_link",
- "ctrl_link_iface", "stream_pixel";
+ "ctrl_link_iface", "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
- <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
+ <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+ <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
@@ -4494,10 +4502,12 @@ mdss0_dp2: displayport-controller@ae9a000 {
<&dispcc0 DISP_CC_MDSS_DPTX2_AUX_CLK>,
<&dispcc0 DISP_CC_MDSS_DPTX2_LINK_CLK>,
<&dispcc0 DISP_CC_MDSS_DPTX2_LINK_INTF_CLK>,
- <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>;
+ <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL1_CLK>;
clock-names = "core_iface", "core_aux",
"ctrl_link",
- "ctrl_link_iface", "stream_pixel";
+ "ctrl_link_iface", "stream_pixel",
+ "stream_1_pixel";
interrupt-parent = <&mdss0>;
interrupts = <14>;
phys = <&mdss0_dp2_phy>;
@@ -4505,8 +4515,11 @@ mdss0_dp2: displayport-controller@ae9a000 {
power-domains = <&rpmhpd SC8280XP_MMCX>;
assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX2_LINK_CLK_SRC>,
- <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>;
- assigned-clock-parents = <&mdss0_dp2_phy 0>, <&mdss0_dp2_phy 1>;
+ <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>,
+ <&dispcc0 DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC>;
+ assigned-clock-parents = <&mdss0_dp2_phy 0>,
+ <&mdss0_dp2_phy 1>,
+ <&mdss0_dp2_phy 1>;
operating-points-v2 = <&mdss0_dp2_opp_table>;
#sound-dai-cells = <0>;
@@ -5675,10 +5688,12 @@ mdss1_dp0: displayport-controller@22090000 {
<&dispcc1 DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc1 DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc1 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface", "core_aux",
"ctrl_link",
- "ctrl_link_iface", "stream_pixel";
+ "ctrl_link_iface", "stream_pixel",
+ "stream_1_pixel";
interrupt-parent = <&mdss1>;
interrupts = <12>;
phys = <&mdss1_dp0_phy>;
@@ -5686,8 +5701,11 @@ mdss1_dp0: displayport-controller@22090000 {
power-domains = <&rpmhpd SC8280XP_MMCX>;
assigned-clocks = <&dispcc1 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
- assigned-clock-parents = <&mdss1_dp0_phy 0>, <&mdss1_dp0_phy 1>;
+ <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc1 DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
+ assigned-clock-parents = <&mdss1_dp0_phy 0>,
+ <&mdss1_dp0_phy 1>,
+ <&mdss1_dp0_phy 1>;
operating-points-v2 = <&mdss1_dp0_opp_table>;
#sound-dai-cells = <0>;
@@ -5750,10 +5768,12 @@ mdss1_dp1: displayport-controller@22098000 {
<&dispcc1 DISP_CC_MDSS_DPTX1_AUX_CLK>,
<&dispcc1 DISP_CC_MDSS_DPTX1_LINK_CLK>,
<&dispcc1 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
- <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+ <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+ <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
clock-names = "core_iface", "core_aux",
"ctrl_link",
- "ctrl_link_iface", "stream_pixel";
+ "ctrl_link_iface", "stream_pixel",
+ "stream_1_pixel";
interrupt-parent = <&mdss1>;
interrupts = <13>;
phys = <&mdss1_dp1_phy>;
@@ -5761,8 +5781,11 @@ mdss1_dp1: displayport-controller@22098000 {
power-domains = <&rpmhpd SC8280XP_MMCX>;
assigned-clocks = <&dispcc1 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
- <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
- assigned-clock-parents = <&mdss1_dp1_phy 0>, <&mdss1_dp1_phy 1>;
+ <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+ <&dispcc1 DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
+ assigned-clock-parents = <&mdss1_dp1_phy 0>,
+ <&mdss1_dp1_phy 1>,
+ <&mdss1_dp1_phy 1>;
operating-points-v2 = <&mdss1_dp1_opp_table>;
#sound-dai-cells = <0>;
@@ -5825,10 +5848,12 @@ mdss1_dp2: displayport-controller@2209a000 {
<&dispcc1 DISP_CC_MDSS_DPTX2_AUX_CLK>,
<&dispcc1 DISP_CC_MDSS_DPTX2_LINK_CLK>,
<&dispcc1 DISP_CC_MDSS_DPTX2_LINK_INTF_CLK>,
- <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>;
+ <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK>,
+ <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL1_CLK>;
clock-names = "core_iface", "core_aux",
"ctrl_link",
- "ctrl_link_iface", "stream_pixel";
+ "ctrl_link_iface", "stream_pixel",
+ "stream_1_pixel";
interrupt-parent = <&mdss1>;
interrupts = <14>;
phys = <&mdss1_dp2_phy>;
@@ -5836,8 +5861,11 @@ mdss1_dp2: displayport-controller@2209a000 {
power-domains = <&rpmhpd SC8280XP_MMCX>;
assigned-clocks = <&dispcc1 DISP_CC_MDSS_DPTX2_LINK_CLK_SRC>,
- <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>;
- assigned-clock-parents = <&mdss1_dp2_phy 0>, <&mdss1_dp2_phy 1>;
+ <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>,
+ <&dispcc1 DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC>;
+ assigned-clock-parents = <&mdss1_dp2_phy 0>,
+ <&mdss1_dp2_phy 1>,
+ <&mdss1_dp2_phy 1>;
operating-points-v2 = <&mdss1_dp2_opp_table>;
#sound-dai-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 828b55cb6baf10458feae8f53c04663ef958601e..816987906ca51b8c7eb834d8b850839941eadb6b 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4656,12 +4656,19 @@ mdss_dp: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
- clock-names = "core_iface", "core_aux", "ctrl_link",
- "ctrl_link_iface", "stream_pixel";
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
+ clock-names = "core_iface",
+ "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface",
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
phy-names = "dp";
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 4b347ee3244100a4db515515b73575383c5a0cb7..e0beb5373cdc8ff92f165d7a971f8f7dce31bca8 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3890,16 +3890,20 @@ mdss_dp: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 244339cfbed5c32708c282de18f5655535e2ff45..272b41214ab31edd2c0c695cf294f0959167585a 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4771,16 +4771,20 @@ mdss_dp: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 9a4207ead6156333b8b6030fb0fbc1d215948041..136f40a3b9767133d6a4fe52753530bccced3391 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2876,16 +2876,20 @@ mdss_dp: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 2baef6869ed7c17efb239e86013c15ef6ef5f48f..1b482dc5f574acd5ea938c9953a35164e51c6cb3 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3431,16 +3431,20 @@ mdss_dp0: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 38d139d1dd4a994287c03d064ca01d59a11ac771..2d085680afd1bed2bd2477c21ae4b798efe6a066 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3755,16 +3755,20 @@ mdss_dp0: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>;
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index d6794901f06b50e8629afd081cb7d229ea342f84..887b2ea055e8d969ba9ad07e738dcb6feccc0e61 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5657,16 +5657,20 @@ mdss_dp0: displayport-controller@af54000 {
<&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
operating-points-v2 = <&dp_opp_table>;
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index f293b13ecc0ce426661187ac793f147d12434fcb..7c5f6c101ac10ce6fbc5eead177246ce77c668bf 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -5338,16 +5338,20 @@ mdss_dp0: displayport-controller@ae90000 {
<&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_ss0_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
operating-points-v2 = <&mdss_dp0_opp_table>;
@@ -5421,16 +5425,20 @@ mdss_dp1: displayport-controller@ae98000 {
<&dispcc DISP_CC_MDSS_DPTX1_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DPTX1_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+ <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX1_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_ss1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
operating-points-v2 = <&mdss_dp1_opp_table>;
@@ -5504,16 +5512,20 @@ mdss_dp2: displayport-controller@ae9a000 {
<&dispcc DISP_CC_MDSS_DPTX2_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DPTX2_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DPTX2_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK>;
+ <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX2_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX2_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>;
+ <&dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_1_ss2_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
operating-points-v2 = <&mdss_dp2_opp_table>;
--
2.47.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport
2025-09-03 11:58 ` [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport Dmitry Baryshkov
@ 2025-09-03 13:41 ` Konrad Dybcio
2025-09-03 13:58 ` Dmitry Baryshkov
0 siblings, 1 reply; 17+ messages in thread
From: Konrad Dybcio @ 2025-09-03 13:41 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Dmitry Baryshkov, Abhinav Kumar,
Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Kuogee Hsieh, Abel Vesa, Mahadevan, Bjorn Andersson,
Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
On 9/3/25 1:58 PM, Dmitry Baryshkov wrote:
> From: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
>
> Update Qualcomm DT files in order to declare extra stream pixel clocks
> and extra register resources used on these platforms to support
> DisplayPort MST.
>
> The driver will continue to work with the old DTS files as even after
> adding MST support the driver will have to support old DTS files which
> didn't have MST clocks.
>
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
[...]
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> index 70c87c79e1325f4ab4c81f34e99c0b52be4b3810..e6a7248040095077d6f98d632f4e8a1868432445 100644
> --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> @@ -3241,16 +3241,20 @@ mdss_dp0: displayport-controller@ae90000 {
> <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
> clock-names = "core_iface",
> "core_aux",
> "ctrl_link",
> "ctrl_link_iface",
> - "stream_pixel";
> + "stream_pixel",
> + "stream_1_pixel";
>
> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
> assigned-clock-parents = <&usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
> <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
>
> phys = <&usb_prim_qmpphy QMP_USB43DP_DP_PHY>;
> @@ -3319,16 +3323,20 @@ mdss_dp1: displayport-controller@ae98000 {
> <&dispcc DISP_CC_MDSS_DP_AUX1_CLK>,
> <&dispcc DISP_CC_MDSS_DP_LINK1_CLK>,
> <&dispcc DISP_CC_MDSS_DP_LINK1_INTF_CLK>,
> - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>;
> + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
> clock-names = "core_iface",
> "core_aux",
> "ctrl_link",
> "ctrl_link_iface",
> - "stream_pixel";
> + "stream_pixel",
> + "stream_1_pixel";
>
> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK1_CLK_SRC>,
> - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>;
> + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
> assigned-clock-parents = <&usb_sec_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
> <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
Something's not right here
Konrad
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport
2025-09-03 13:41 ` Konrad Dybcio
@ 2025-09-03 13:58 ` Dmitry Baryshkov
2025-09-03 15:33 ` Konrad Dybcio
0 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 13:58 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
On Wed, Sep 03, 2025 at 03:41:45PM +0200, Konrad Dybcio wrote:
> On 9/3/25 1:58 PM, Dmitry Baryshkov wrote:
> > From: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> >
> > Update Qualcomm DT files in order to declare extra stream pixel clocks
> > and extra register resources used on these platforms to support
> > DisplayPort MST.
> >
> > The driver will continue to work with the old DTS files as even after
> > adding MST support the driver will have to support old DTS files which
> > didn't have MST clocks.
> >
> > Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
>
> [...]
>
> > diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> > index 70c87c79e1325f4ab4c81f34e99c0b52be4b3810..e6a7248040095077d6f98d632f4e8a1868432445 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> > @@ -3241,16 +3241,20 @@ mdss_dp0: displayport-controller@ae90000 {
> > <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> > <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> > <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> > - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
> > clock-names = "core_iface",
> > "core_aux",
> > "ctrl_link",
> > "ctrl_link_iface",
> > - "stream_pixel";
> > + "stream_pixel",
> > + "stream_1_pixel";
> >
> > assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> > - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
> > assigned-clock-parents = <&usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> > + <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
> > <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> >
> > phys = <&usb_prim_qmpphy QMP_USB43DP_DP_PHY>;
> > @@ -3319,16 +3323,20 @@ mdss_dp1: displayport-controller@ae98000 {
> > <&dispcc DISP_CC_MDSS_DP_AUX1_CLK>,
> > <&dispcc DISP_CC_MDSS_DP_LINK1_CLK>,
> > <&dispcc DISP_CC_MDSS_DP_LINK1_INTF_CLK>,
> > - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>;
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>,
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
> > clock-names = "core_iface",
> > "core_aux",
> > "ctrl_link",
> > "ctrl_link_iface",
> > - "stream_pixel";
> > + "stream_pixel",
> > + "stream_1_pixel";
> >
> > assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK1_CLK_SRC>,
> > - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>;
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>,
> > + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
> > assigned-clock-parents = <&usb_sec_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> > + <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
> > <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
>
> Something's not right here
No, it's correct as far as I understand. On this platform INTF3 / PIXEL1
is shared between INTF0 / PIXEL and INTF4 / PIXEL2. So it is
counterintuitive, but seems to be correct.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport
2025-09-03 13:58 ` Dmitry Baryshkov
@ 2025-09-03 15:33 ` Konrad Dybcio
2025-09-03 16:24 ` Dmitry Baryshkov
0 siblings, 1 reply; 17+ messages in thread
From: Konrad Dybcio @ 2025-09-03 15:33 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
On 9/3/25 3:58 PM, Dmitry Baryshkov wrote:
> On Wed, Sep 03, 2025 at 03:41:45PM +0200, Konrad Dybcio wrote:
>> On 9/3/25 1:58 PM, Dmitry Baryshkov wrote:
>>> From: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
>>>
>>> Update Qualcomm DT files in order to declare extra stream pixel clocks
>>> and extra register resources used on these platforms to support
>>> DisplayPort MST.
>>>
>>> The driver will continue to work with the old DTS files as even after
>>> adding MST support the driver will have to support old DTS files which
>>> didn't have MST clocks.
>>>
>>> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>> ---
>>
>> [...]
>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
>>> index 70c87c79e1325f4ab4c81f34e99c0b52be4b3810..e6a7248040095077d6f98d632f4e8a1868432445 100644
>>> --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
>>> @@ -3241,16 +3241,20 @@ mdss_dp0: displayport-controller@ae90000 {
>>> <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
>>> <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
>>> <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
>>> - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
>>> clock-names = "core_iface",
>>> "core_aux",
>>> "ctrl_link",
>>> "ctrl_link_iface",
>>> - "stream_pixel";
>>> + "stream_pixel",
>>> + "stream_1_pixel";
>>>
>>> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
>>> - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
>>> assigned-clock-parents = <&usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK>,
>>> + <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
>>> <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
>>>
>>> phys = <&usb_prim_qmpphy QMP_USB43DP_DP_PHY>;
>>> @@ -3319,16 +3323,20 @@ mdss_dp1: displayport-controller@ae98000 {
>>> <&dispcc DISP_CC_MDSS_DP_AUX1_CLK>,
>>> <&dispcc DISP_CC_MDSS_DP_LINK1_CLK>,
>>> <&dispcc DISP_CC_MDSS_DP_LINK1_INTF_CLK>,
>>> - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>;
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>,
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
>>> clock-names = "core_iface",
>>> "core_aux",
>>> "ctrl_link",
>>> "ctrl_link_iface",
>>> - "stream_pixel";
>>> + "stream_pixel",
>>> + "stream_1_pixel";
>>>
>>> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK1_CLK_SRC>,
>>> - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>;
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>,
>>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
>>> assigned-clock-parents = <&usb_sec_qmpphy QMP_USB43DP_DP_LINK_CLK>,
>>> + <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
>>> <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
>>
>> Something's not right here
>
> No, it's correct as far as I understand. On this platform INTF3 / PIXEL1
> is shared between INTF0 / PIXEL and INTF4 / PIXEL2. So it is
> counterintuitive, but seems to be correct.
Eh, I unfortunately found confirmation for what you said. Hopefully this
doesn't cause too much extra pain on the driver side
Konrad
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v8 9/9] arm64: dts: qcom: Add MST pixel streams for displayport
2025-09-03 15:33 ` Konrad Dybcio
@ 2025-09-03 16:24 ` Dmitry Baryshkov
0 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-09-03 16:24 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kuogee Hsieh, Abel Vesa,
Mahadevan, Bjorn Andersson, Konrad Dybcio, linux-arm-msm,
dri-devel, freedreno, devicetree, linux-kernel,
Krzysztof Kozlowski
On Wed, Sep 03, 2025 at 05:33:41PM +0200, Konrad Dybcio wrote:
> On 9/3/25 3:58 PM, Dmitry Baryshkov wrote:
> > On Wed, Sep 03, 2025 at 03:41:45PM +0200, Konrad Dybcio wrote:
> >> On 9/3/25 1:58 PM, Dmitry Baryshkov wrote:
> >>> From: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> >>>
> >>> Update Qualcomm DT files in order to declare extra stream pixel clocks
> >>> and extra register resources used on these platforms to support
> >>> DisplayPort MST.
> >>>
> >>> The driver will continue to work with the old DTS files as even after
> >>> adding MST support the driver will have to support old DTS files which
> >>> didn't have MST clocks.
> >>>
> >>> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> >>> ---
> >>
> >> [...]
> >>
> >>> diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> >>> index 70c87c79e1325f4ab4c81f34e99c0b52be4b3810..e6a7248040095077d6f98d632f4e8a1868432445 100644
> >>> --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> >>> +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> >>> @@ -3241,16 +3241,20 @@ mdss_dp0: displayport-controller@ae90000 {
> >>> <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> >>> <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> >>> <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> >>> - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
> >>> clock-names = "core_iface",
> >>> "core_aux",
> >>> "ctrl_link",
> >>> "ctrl_link_iface",
> >>> - "stream_pixel";
> >>> + "stream_pixel",
> >>> + "stream_1_pixel";
> >>>
> >>> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> >>> - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
> >>> assigned-clock-parents = <&usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> >>> + <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
> >>> <&usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> >>>
> >>> phys = <&usb_prim_qmpphy QMP_USB43DP_DP_PHY>;
> >>> @@ -3319,16 +3323,20 @@ mdss_dp1: displayport-controller@ae98000 {
> >>> <&dispcc DISP_CC_MDSS_DP_AUX1_CLK>,
> >>> <&dispcc DISP_CC_MDSS_DP_LINK1_CLK>,
> >>> <&dispcc DISP_CC_MDSS_DP_LINK1_INTF_CLK>,
> >>> - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>;
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK>,
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
> >>> clock-names = "core_iface",
> >>> "core_aux",
> >>> "ctrl_link",
> >>> "ctrl_link_iface",
> >>> - "stream_pixel";
> >>> + "stream_pixel",
> >>> + "stream_1_pixel";
> >>>
> >>> assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK1_CLK_SRC>,
> >>> - <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>;
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC>,
> >>> + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
> >>> assigned-clock-parents = <&usb_sec_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> >>> + <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
> >>> <&usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> >>
> >> Something's not right here
> >
> > No, it's correct as far as I understand. On this platform INTF3 / PIXEL1
> > is shared between INTF0 / PIXEL and INTF4 / PIXEL2. So it is
> > counterintuitive, but seems to be correct.
>
> Eh, I unfortunately found confirmation for what you said. Hopefully this
> doesn't cause too much extra pain on the driver side
It will, at a certain point. IIUC, during the first submission we are
going to handle only the INTF0+INTF3 for those platforms.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 17+ messages in thread