* [PATCH v2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
@ 2025-09-03 11:13 Harikrishna Shenoy
2025-09-03 22:03 ` Rob Herring
0 siblings, 1 reply; 4+ messages in thread
From: Harikrishna Shenoy @ 2025-09-03 11:13 UTC (permalink / raw)
To: andrzej.hajda, neil.armstrong, rfoss, Laurent.pinchart, jonas,
jernej.skrabec, airlied, simona, maarten.lankhorst, mripard,
tzimmermann, robh, krzk+dt, conor+dt, sjakhade, yamonkar,
dri-devel, devicetree, linux-kernel, devarsht, u-kumar1, s-jain1
Cc: h-shenoy
From: Swapnil Jakhade <sjakhade@cadence.com>
Add binding changes for DSC(Display Stream Compression) in the MHDP8546
DPI/DP bridge.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
---
.../bindings/display/bridge/cdns,mhdp8546.yaml | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
index c2b369456e4e..6e749c002669 100644
--- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
@@ -27,6 +27,8 @@ properties:
Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
- description:
Register block of mhdptx sapb registers.
+ - description:
+ Register block for mhdptx DSC encoder registers.
reg-names:
minItems: 1
@@ -34,6 +36,7 @@ properties:
- const: mhdptx
- const: j721e-intg
- const: mhdptx-sapb
+ - const: mhdptx-dsc
clocks:
maxItems: 1
@@ -100,18 +103,18 @@ allOf:
properties:
reg:
minItems: 2
- maxItems: 3
+ maxItems: 4
reg-names:
minItems: 2
- maxItems: 3
+ maxItems: 4
else:
properties:
reg:
minItems: 1
- maxItems: 2
+ maxItems: 3
reg-names:
minItems: 1
- maxItems: 2
+ maxItems: 3
required:
- compatible
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
2025-09-03 11:13 [PATCH v2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC Harikrishna Shenoy
@ 2025-09-03 22:03 ` Rob Herring
2025-09-04 8:28 ` Devarsh Thakkar
2025-09-05 9:57 ` Harikrishna Shenoy
0 siblings, 2 replies; 4+ messages in thread
From: Rob Herring @ 2025-09-03 22:03 UTC (permalink / raw)
To: Harikrishna Shenoy
Cc: andrzej.hajda, neil.armstrong, rfoss, Laurent.pinchart, jonas,
jernej.skrabec, airlied, simona, maarten.lankhorst, mripard,
tzimmermann, krzk+dt, conor+dt, sjakhade, yamonkar, dri-devel,
devicetree, linux-kernel, devarsht, u-kumar1, s-jain1
On Wed, Sep 03, 2025 at 04:43:57PM +0530, Harikrishna Shenoy wrote:
> From: Swapnil Jakhade <sjakhade@cadence.com>
>
> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
> DPI/DP bridge.
>
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
> ---
> .../bindings/display/bridge/cdns,mhdp8546.yaml | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> index c2b369456e4e..6e749c002669 100644
> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> @@ -27,6 +27,8 @@ properties:
> Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
> - description:
> Register block of mhdptx sapb registers.
> + - description:
> + Register block for mhdptx DSC encoder registers.
>
> reg-names:
> minItems: 1
> @@ -34,6 +36,7 @@ properties:
> - const: mhdptx
> - const: j721e-intg
> - const: mhdptx-sapb
> + - const: mhdptx-dsc
'mhdptx' is redundant. Don't continue that pattern. Just 'dsc'.
>
> clocks:
> maxItems: 1
> @@ -100,18 +103,18 @@ allOf:
> properties:
> reg:
> minItems: 2
> - maxItems: 3
> + maxItems: 4
> reg-names:
> minItems: 2
> - maxItems: 3
> + maxItems: 4
> else:
> properties:
> reg:
> minItems: 1
> - maxItems: 2
> + maxItems: 3
> reg-names:
> minItems: 1
> - maxItems: 2
> + maxItems: 3
Have you tested this works? While it might work for TI with the
j721e-intg registers in the middle, it won't work for platforms without
them. You're going to have to have 2 lists of reg-names.
Rob
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
2025-09-03 22:03 ` Rob Herring
@ 2025-09-04 8:28 ` Devarsh Thakkar
2025-09-05 9:57 ` Harikrishna Shenoy
1 sibling, 0 replies; 4+ messages in thread
From: Devarsh Thakkar @ 2025-09-04 8:28 UTC (permalink / raw)
To: Rob Herring, Harikrishna Shenoy
Cc: andrzej.hajda, neil.armstrong, rfoss, Laurent.pinchart, jonas,
jernej.skrabec, airlied, simona, maarten.lankhorst, mripard,
tzimmermann, krzk+dt, conor+dt, sjakhade, yamonkar, dri-devel,
devicetree, linux-kernel, u-kumar1, s-jain1
Hi Hari,
On 04/09/25 03:33, Rob Herring wrote:
> On Wed, Sep 03, 2025 at 04:43:57PM +0530, Harikrishna Shenoy wrote:
>> From: Swapnil Jakhade <sjakhade@cadence.com>
>>
>> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
>> DPI/DP bridge.
>>
>> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
>> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
>> ---
>> .../bindings/display/bridge/cdns,mhdp8546.yaml | 11 +++++++----
>> 1 file changed, 7 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> index c2b369456e4e..6e749c002669 100644
>> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> @@ -27,6 +27,8 @@ properties:
>> Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
>> - description:
>> Register block of mhdptx sapb registers.
>> + - description:
>> + Register block for mhdptx DSC encoder registers.
>>
>> reg-names:
>> minItems: 1
>> @@ -34,6 +36,7 @@ properties:
>> - const: mhdptx
>> - const: j721e-intg
>> - const: mhdptx-sapb
>> + - const: mhdptx-dsc
>
> 'mhdptx' is redundant. Don't continue that pattern. Just 'dsc'.
>
>>
>> clocks:
>> maxItems: 1
>> @@ -100,18 +103,18 @@ allOf:
>> properties:
>> reg:
>> minItems: 2
>> - maxItems: 3
>> + maxItems: 4
>> reg-names:
>> minItems: 2
>> - maxItems: 3
>> + maxItems: 4
>> else:
>> properties:
>> reg:
>> minItems: 1
>> - maxItems: 2
>> + maxItems: 3
>> reg-names:
>> minItems: 1
>> - maxItems: 2
>> + maxItems: 3
>
> Have you tested this works? While it might work for TI with the
> j721e-intg registers in the middle, it won't work for platforms without
> them. You're going to have to have 2 lists of reg-names.
>
Yes, as discussed offline you probably need an if else for reg blocks
too here i.e. one for generic cadence compatible which would have
cadence specific blocks common for all SoCs and other for j721e specific
compatible which would have j721e specific reg blocks.
Regards
Devarsh
> Rob
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
2025-09-03 22:03 ` Rob Herring
2025-09-04 8:28 ` Devarsh Thakkar
@ 2025-09-05 9:57 ` Harikrishna Shenoy
1 sibling, 0 replies; 4+ messages in thread
From: Harikrishna Shenoy @ 2025-09-05 9:57 UTC (permalink / raw)
To: Rob Herring
Cc: andrzej.hajda, neil.armstrong, rfoss, Laurent.pinchart, jonas,
jernej.skrabec, airlied, simona, maarten.lankhorst, mripard,
tzimmermann, krzk+dt, conor+dt, sjakhade, yamonkar, dri-devel,
devicetree, linux-kernel, devarsht, u-kumar1, s-jain1
On 9/4/25 03:33, Rob Herring wrote:
> On Wed, Sep 03, 2025 at 04:43:57PM +0530, Harikrishna Shenoy wrote:
>> From: Swapnil Jakhade <sjakhade@cadence.com>
>>
>> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
>> DPI/DP bridge.
>>
>> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
>> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
>> ---
>> .../bindings/display/bridge/cdns,mhdp8546.yaml | 11 +++++++----
>> 1 file changed, 7 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> index c2b369456e4e..6e749c002669 100644
>> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> @@ -27,6 +27,8 @@ properties:
>> Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
>> - description:
>> Register block of mhdptx sapb registers.
>> + - description:
>> + Register block for mhdptx DSC encoder registers.
>>
>> reg-names:
>> minItems: 1
>> @@ -34,6 +36,7 @@ properties:
>> - const: mhdptx
>> - const: j721e-intg
>> - const: mhdptx-sapb
>> + - const: mhdptx-dsc
> 'mhdptx' is redundant. Don't continue that pattern. Just 'dsc'.
so sequence should be mhdptx, j721e-intg, mhdptx-sapb, dsc?
>
>>
>> clocks:
>> maxItems: 1
>> @@ -100,18 +103,18 @@ allOf:
>> properties:
>> reg:
>> minItems: 2
>> - maxItems: 3
>> + maxItems: 4
>> reg-names:
>> minItems: 2
>> - maxItems: 3
>> + maxItems: 4
>> else:
>> properties:
>> reg:
>> minItems: 1
>> - maxItems: 2
>> + maxItems: 3
>> reg-names:
>> minItems: 1
>> - maxItems: 2
>> + maxItems: 3
> Have you tested this works? While it might work for TI with the
> j721e-intg registers in the middle, it won't work for platforms without
> them. You're going to have to have 2 lists of reg-names.
>
> Rob
>
I will add two lists one with and one without j721e-integ in the 'if'
condtional
^ permalink raw reply [flat|nested] 4+ messages in thread
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2025-09-03 11:13 [PATCH v2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC Harikrishna Shenoy
2025-09-03 22:03 ` Rob Herring
2025-09-04 8:28 ` Devarsh Thakkar
2025-09-05 9:57 ` Harikrishna Shenoy
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