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([103.218.174.23]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35e41e1196asm2740502a91.1.2026.04.11.22.38.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Apr 2026 22:38:33 -0700 (PDT) From: Sudarshan Shetty To: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, marex@denx.de, valentin@compulab.co.il, luca.ceresoli@bootlin.com, philippe.schenker@toradex.com, alexander.stein@ew.tq-group.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Sudarshan Shetty Subject: [PATCH v3 1/1] drm: bridge: ti-sn65dsi83: Fix DSI mode flags for stable LVDS output Date: Sun, 12 Apr 2026 11:08:11 +0530 Message-Id: <20260412053811.662461-2-tessolveupstream@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260412053811.662461-1-tessolveupstream@gmail.com> References: <20260412053811.662461-1-tessolveupstream@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The current DSI mode configuration enables VIDEO_BURST and disables horizontal front porch (HFP) and back porch (HBP) transmission using MIPI_DSI_MODE_VIDEO_NO_HFP and MIPI_DSI_MODE_VIDEO_NO_HBP. However, the SN65DSI83/84 bridge relies on receiving full horizontal timing information over DSI in order to correctly reconstruct the LVDS output timings. When HFP and HBP are not transmitted, the bridge cannot recreate the required timing parameters, resulting in unstable or missing display output on some panels. Additionally, while burst mode is supported by the hardware, its use depends on continuous clock behavior from the DSI host. In practice, burst mode may introduce instability depending on the host controller implementation, as the DSI link may transition to low-power state between bursts. In testing, removing burst mode and ensuring full horizontal timing transmission results in stable LVDS output across affected panels. Update the DSI mode flags to: - Drop MIPI_DSI_MODE_VIDEO_BURST - Drop MIPI_DSI_MODE_VIDEO_NO_HFP - Drop MIPI_DSI_MODE_VIDEO_NO_HBP This aligns with common system configurations where non-burst mode is preferred and full timing information is transmitted over DSI. Signed-off-by: Sudarshan Shetty --- drivers/gpu/drm/bridge/ti-sn65dsi83.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c index fef6bca3273f..9d51dc2b75bc 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c @@ -976,9 +976,8 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx) dsi->lanes = dsi_lanes; dsi->format = MIPI_DSI_FMT_RGB888; - dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP | - MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET; + dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_NO_HSA | + MIPI_DSI_MODE_NO_EOT_PACKET; ret = devm_mipi_dsi_attach(dev, dsi); if (ret < 0) { -- 2.34.1