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Signed-off-by: Daksh Sahni --- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 2 +- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c | 2 +- drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 7af86a32c0c5..e5884bb4d63a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -564,7 +564,7 @@ static int amdgpu_ctx_query(struct amdgpu_device *adev, out->state.flags = 0x0; out->state.hangs = 0x0; - /* determine if a GPU reset has occured since the last call */ + /* determine if a GPU reset has occurred since the last call */ reset_counter = atomic_read(&adev->gpu_reset_counter); /* TODO: this should ideally return NO, GUILTY, or INNOCENT. */ if (ctx->reset_counter_query == reset_counter) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c index 124fb38eb465..095ab609623f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c @@ -161,12 +161,12 @@ void amdgpu_pasid_free_delayed(struct dma_resv *resv, */ /** - * amdgpu_vmid_had_gpu_reset - check if reset occured since last use + * amdgpu_vmid_had_gpu_reset - check if reset occurred since last use * * @adev: amdgpu_device pointer * @id: VMID structure * - * Check if GPU reset occured since last use of the VMID. + * Check if GPU reset occurred since last use of the VMID. */ bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev, struct amdgpu_vmid *id) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h index 56a88e14a044..bc011b4639f2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h @@ -31,7 +31,7 @@ #define AMDGPU_PREAMBLE_IB_PRESENT (1 << 0) /* bit set means preamble IB is first presented in belonging context */ #define AMDGPU_PREAMBLE_IB_PRESENT_FIRST (1 << 1) -/* bit set means context switch occured */ +/* bit set means context switch occurred */ #define AMDGPU_HAVE_CTX_SWITCH (1 << 2) /* bit set means IB is preempted */ #define AMDGPU_IB_PREEMPTED (1 << 3) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c index 5bc3bc60a2ac..ebbe7900205e 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c @@ -46,7 +46,7 @@ static void dcn20_wait_for_vmid_ready(struct dcn20_vmid *vmid) /* According the hardware spec, we need to poll for the lowest * bit of PAGE_TABLE_BASE_ADDR_LO32 = 1 any time a GPUVM * context is updated. We can't use REG_WAIT here since we - * don't have a seperate field to wait on. + * don't have a separate field to wait on. * * TODO: Confirm timeout / poll interval with hardware team */ diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h index c18ff8f00bb8..43b05e56679c 100644 --- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h +++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h @@ -355,7 +355,7 @@ struct dmub_srv_hw_params { /** * struct dmub_srv_debug - Debug info for dmub_srv - * @timeout_occured: Indicates a timeout occured on any message from driver to dmub + * @timeout_occured: Indicates a timeout occurred on any message from driver to dmub * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored */ struct dmub_timeout_info { -- 2.54.0