From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E30F5CD98E0 for ; Sat, 13 Jun 2026 06:58:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2581810EC74; Sat, 13 Jun 2026 06:58:46 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="CvDzdof9"; dkim-atps=neutral Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4559910ECBB for ; Sat, 13 Jun 2026 06:58:42 +0000 (UTC) Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-490ac357c55so15186985e9.1 for ; Fri, 12 Jun 2026 23:58:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1781333921; x=1781938721; darn=lists.freedesktop.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ExjVQvO4/iWqbTjsUJjExpq/Pad0yGuPxgZEv8g/Xlo=; b=CvDzdof9D065peEVQl191z0Mgy6z6W5qPILSYma2THHvvm4Y1/OJKIccLq7FFMRmbU i0t7eU5qdMDXEXmahy0RMEXnDigJhwaOoSGVtr2uMb5zBQXYauqM5rUIK6/Y4AXpdjop DUkGIlzK4iJJRhLdbQIFFcd/N5uo12X79cmtyGElQuVbX//cRi3ExNCyCNHQvolZxryK 6z+XH1BO1KOrYDCTdMOtv0OWH+N3Zg/OFKoHRDeIcg730er1frIMm0gl06hnkaJNPDJH cn1KTylqr5tagkQBeIS3wAQcZy62CDaNDgUdFnbdLwzwS+gBCPfLWUozwdLr/KXFojJB EV4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781333921; x=1781938721; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ExjVQvO4/iWqbTjsUJjExpq/Pad0yGuPxgZEv8g/Xlo=; b=aNdaJnQjVwhgghLgSB0gdR1GidzGM4r+hIhSrlJH8rOSjHZFL5uBUvYK566wUMY8Wn 0sRHqsiYHl9Xf5OIeGm+xcnsNdW3adAWxN8cSCyzADSr1NpeHAte0iJbJpUjXwkPBns/ ytQMxz6C5fuLAip0Fd7e247NeBdm2fFnZUj06319T75tuYkidXLIxwj4XXCC2BOGwOHj cbtJDHa7H2UIhbUb5u/PLbPhXHw/z8x2gE4aFOQjfvFcG3D3/9nCi0Gpu5QOXYZ+fyW/ QNYj48eQd95jnpUZ1cD+YSkyLFX77dTWFroyKjLXgy+KQVKsqEqqY3pwl1cL7MbQOtdr WcCw== X-Gm-Message-State: AOJu0Yx73Y4WgJe8PGP8X9LGrojM/Bk9jYGiQNUidiAvJfaAdvg4vcHb ONx8ilHxbrogqcUP2+bQJeqirz+HOCByaQoeqW+ErcyGBHWUFVPUXtOo X-Gm-Gg: Acq92OHT61y9ZcGhuVoQvtfLD1uwClLRPJ7EQxKvSpj4C7W9sy2UMI9MSDgxWzkpw4N 4NZtGsaJKoGBN58gUYVQPdR14fjhwI2i6cf7UkgTAJfk8UipRZb2sitfGcWiOgyKsIvOgsPJtKq NA1pkDmJs3Fn76RAb7/pIz3CymXZ3dk/ptad3Z8Ve+kjTEVhqlHM2Gg59x4STHEapEtKC0l4DfS Y8t7JAfCxutIZxrRbo6M73vWgLuc4L2wDmeIYqBJiPTNXDp11H4pHBFWuhu1nXfOq+vNXB5Xp14 by2jUjBqSVdjEfYkMF2InZvYtZNInc6QBR+6xl1Zt+rx/1r2V5IstRciMB3ZxwlRyqTa1GLJpxo HlU0WTGj6ucxZq3wEPhwQ1ZDQNGeUcehhZyeY7kaN1/WvsyovfF9GkRWHNLLhwm9UEeKHkwGpHg snBwVQjpNs9QDpLYBeyRggWm60tjoAYcpq6t99RT5OzQ== X-Received: by 2002:a05:600c:a47:b0:490:52c0:744c with SMTP id 5b1f17b1804b1-490ec4ee63cmr73748795e9.20.1781333920798; Fri, 12 Jun 2026 23:58:40 -0700 (PDT) Received: from debian.tailb81abf.ts.net ([2a01:e0a:104a:4d80:14c0:9448:1c38:77df]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-492202e5cbasm42917705e9.2.2026.06.12.23.58.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jun 2026 23:58:40 -0700 (PDT) From: MidG971 To: tomeu@tomeuvizoso.net, ogabbay@kernel.org, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, ulf.hansson@linaro.org Cc: dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, xxm@rock-chips.com, chaoyi.chen@rock-chips.com, finley.xiao@rock-chips.com, diederik@cknow-tech.com, jonas@kwiboo.se, Midgy BALON Subject: [RFC PATCH v4 7/9] arm64: dts: rockchip: rk356x: Add the NPU and its IOMMU Date: Sat, 13 Jun 2026 09:01:14 +0200 Message-Id: <20260613070116.438906-8-midgy971@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260613070116.438906-1-midgy971@gmail.com> References: <20260613070116.438906-1-midgy971@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Midgy BALON The RK3568 has an NVDLA-derived NPU at fde40000 with its own IOMMU at fde4b000. Add both nodes (disabled by default) and the NPU power-domain child under the PMU power-controller, and point rockchip,pmu at the PMU syscon that controls the NPU NoC bus-idle. Besides the SCMI compute clock, assign the CRU CLK_NPU so the NPU AXI bus clock comes up at 200 MHz rather than the 12 MHz boot default. The power-domain deliberately carries no pm_qos: qos_npu sits behind the NPU NoC, which is gated until the NPU is brought up, so a genpd power-off QoS save would fault reading it. Signed-off-by: Midgy BALON --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index 64bdd8b7754b5..313db59c1aed8 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -512,6 +512,13 @@ power-domain@RK3568_PD_GPU { #power-domain-cells = <0>; }; + pd_npu: power-domain@RK3568_PD_NPU { + reg = ; + clocks = <&cru ACLK_NPU_PRE>, + <&cru HCLK_NPU_PRE>; + #power-domain-cells = <0>; + }; + /* These power domains are grouped by VD_LOGIC */ power-domain@RK3568_PD_VI { reg = ; @@ -572,6 +579,37 @@ power-domain@RK3568_PD_RKVENC { }; }; + rknn_core_0: npu@fde40000 { + compatible = "rockchip,rk3568-rknn-core"; + reg = <0x0 0xfde40000 0x0 0x1000>, + <0x0 0xfde41000 0x0 0x1000>, + <0x0 0xfde43000 0x0 0x1000>; + reg-names = "pc", "cna", "core"; + interrupts = ; + clocks = <&cru ACLK_NPU>, <&cru HCLK_NPU>, + <&scmi_clk SCMI_CLK_NPU>, <&cru PCLK_NPU_PRE>; + clock-names = "aclk", "hclk", "npu", "pclk"; + assigned-clocks = <&scmi_clk SCMI_CLK_NPU>, <&cru CLK_NPU>; + assigned-clock-rates = <200000000>, <600000000>; + resets = <&cru SRST_A_NPU>, <&cru SRST_H_NPU>; + reset-names = "srst_a", "srst_h"; + power-domains = <&power RK3568_PD_NPU>; + rockchip,pmu = <&pmu>; + iommus = <&rknn_mmu_0>; + status = "disabled"; + }; + + rknn_mmu_0: iommu@fde4b000 { + compatible = "rockchip,iommu"; + reg = <0x0 0xfde4b000 0x0 0x40>; + interrupts = ; + clock-names = "aclk", "iface"; + clocks = <&cru ACLK_NPU>, <&cru HCLK_NPU>; + power-domains = <&power RK3568_PD_NPU>; + #iommu-cells = <0>; + status = "disabled"; + }; + gpu: gpu@fde60000 { compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; reg = <0x0 0xfde60000 0x0 0x4000>; -- 2.39.5