From: sashiko-bot@kernel.org
To: "Riana Tauro" <riana.tauro@intel.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v3 3/3] drm/xe/xe_ras: Add error-event support for CRI
Date: Tue, 23 Jun 2026 21:07:03 +0000 [thread overview]
Message-ID: <20260623210703.72D241F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260622101716.3313496-8-riana.tauro@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] ras_send_error_event() passes internal hardware-specific XE enums to xe_ras_get_counter() instead of the expected DRM enums, resulting in queries for the wrong error counters.
--
commit dc2a656220167a5ce967cead702288ba6f6f06e4
Author: Riana Tauro <riana.tauro@intel.com>
drm/xe/xe_ras: Add error-event support for CRI
This commit adds error-event support for correctable errors in CRI,
reporting errors that cross a threshold to userspace via interrupts.
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
[ ... ]
> @@ -131,6 +161,27 @@ static inline const char *comp_to_str(u8 component)
> return xe_ras_components[component];
> }
>
> +static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component)
> +{
> + u8 drm_severity, drm_component;
> + u32 value;
> + int ret;
> +
> + drm_severity = xe_to_drm_ras_severity(severity);
> + if (drm_severity == DRM_XE_RAS_ERR_SEV_MAX)
> + return;
> +
> + drm_component = xe_to_drm_ras_component(component);
> + if (drm_component == DRM_XE_RAS_ERR_COMP_MAX)
> + return;
> +
> + ret = xe_ras_get_counter(xe, severity, component, &value);
[Severity: Medium]
Does this pass the wrong enum type to xe_ras_get_counter?
In this function, severity and component are the raw XE hardware enums. We
convert them to DRM enums just above as drm_severity and drm_component.
Looking at xe_ras_get_counter(), it expects the DRM enums because it converts
them back to XE enums internally:
int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8 component, u32 *value)
{
struct xe_ras_error_class counter = {0};
counter.common.severity = drm_to_xe_ras_severity(severity);
counter.common.component = drm_to_xe_ras_component(component);
...
}
Should this be passing drm_severity and drm_component instead to ensure the
correct telemetry counters are read?
> + if (ret)
> + return;
> +
> + xe_drm_ras_event(xe, drm_component, drm_severity, value, GFP_KERNEL);
> +}
> +
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260622101716.3313496-5-riana.tauro@intel.com?part=3
next prev parent reply other threads:[~2026-06-23 21:07 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-22 10:17 [PATCH v3 0/3] Add drm_ras netlink error event support Riana Tauro
2026-06-22 10:17 ` [PATCH v3 1/3] drm/drm_ras: Add drm_ras netlink error event Riana Tauro
2026-06-23 20:46 ` sashiko-bot
2026-06-22 10:17 ` [PATCH v3 2/3] drm/xe/xe_drm_ras: Add error-event support for PVC Riana Tauro
2026-06-23 20:58 ` sashiko-bot
2026-06-22 10:17 ` [PATCH v3 3/3] drm/xe/xe_ras: Add error-event support for CRI Riana Tauro
2026-06-23 21:07 ` sashiko-bot [this message]
2026-06-30 5:20 ` Raag Jadav
2026-06-30 6:26 ` Tauro, Riana
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