[PATCH v2 3/5] drm: nova: Add GETPARAM parameter to read the GPU chipset

[Alistair Popple <apopple@nvidia.com>]

One of the first things a user needs to know about a GPU is its chipset,
so add an ioctl to return that.

Signed-off-by: Alistair Popple <apopple@nvidia.com>

---

Changes since v1:

 - Vertical import
 - Use a single enum for chipset values
---
 drivers/gpu/drm/nova/driver.rs |  1 -
 drivers/gpu/drm/nova/file.rs   |  3 +-
 drivers/gpu/nova-core/api.rs   | 11 ++++--
 drivers/gpu/nova-core/gpu.rs   | 65 +++++++++++++++++-----------------
 include/uapi/drm/nova_drm.h    | 40 +++++++++++++++++++++
 5 files changed, 84 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/nova/driver.rs b/drivers/gpu/drm/nova/driver.rs
index 0204d1cee6a5..42f8845ed6b4 100644
--- a/drivers/gpu/drm/nova/driver.rs
+++ b/drivers/gpu/drm/nova/driver.rs
@@ -31,7 +31,6 @@ pub(crate) struct Nova<'bound> {
 
 /// DRM registration data, accessible from ioctl handlers via the registration guard.
 pub(crate) struct DrmRegData<'bound> {
-    #[expect(unused)]
     pub(crate) api: Pin<&'bound NovaCoreApi<'bound>>,
 }
 
diff --git a/drivers/gpu/drm/nova/file.rs b/drivers/gpu/drm/nova/file.rs
index 1156df51c533..1e5364c619ed 100644
--- a/drivers/gpu/drm/nova/file.rs
+++ b/drivers/gpu/drm/nova/file.rs
@@ -34,7 +34,7 @@ impl File {
     /// IOCTL: get_param: Query GPU / driver metadata.
     pub(crate) fn get_param(
         dev: &NovaDevice<Registered>,
-        _reg_data: &DrmRegData<'_>,
+        reg_data: &DrmRegData<'_>,
         getparam: &mut uapi::drm_nova_getparam,
         _file: &drm::File<File>,
     ) -> Result<u32> {
@@ -43,6 +43,7 @@ pub(crate) fn get_param(
 
         let value = match getparam.param as u32 {
             uapi::NOVA_GETPARAM_VRAM_BAR_SIZE => pdev.resource_len(1)?,
+            uapi::NOVA_GETPARAM_GPU_CHIPSET => reg_data.api.chipset() as u64,
             _ => return Err(EINVAL),
         };
 
diff --git a/drivers/gpu/nova-core/api.rs b/drivers/gpu/nova-core/api.rs
index 610cfc01111e..09da0b4e9103 100644
--- a/drivers/gpu/nova-core/api.rs
+++ b/drivers/gpu/nova-core/api.rs
@@ -12,11 +12,13 @@
     types::CovariantForLt, //
 };
 
-use crate::gpu::Gpu;
+use crate::gpu::{
+    Chipset,
+    Gpu, //
+};
 
 /// API handle for the auxiliary bus child drivers to interact with nova-core.
 pub struct NovaCoreApi<'bound> {
-    #[expect(unused)]
     pub(crate) gpu: Pin<&'bound Gpu<'bound>>,
 }
 
@@ -26,4 +28,9 @@ impl NovaCoreApi<'_> {
     pub fn of(adev: &auxiliary::Device<Bound>) -> Result<Pin<&NovaCoreApi<'_>>> {
         adev.registration_data::<CovariantForLt!(NovaCoreApi<'_>)>()
     }
+
+    /// Returns the chipset of this GPU.
+    pub fn chipset(&self) -> Chipset {
+        self.gpu.spec.chipset
+    }
 }
diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index 43c3f4f8df71..1f4c5f3aa8ea 100644
--- a/drivers/gpu/nova-core/gpu.rs
+++ b/drivers/gpu/nova-core/gpu.rs
@@ -10,7 +10,8 @@
     num::Bounded,
     pci,
     prelude::*,
-    sizes::SizeConstants, //
+    sizes::SizeConstants,
+    uapi, //
 };
 
 use crate::{
@@ -34,12 +35,12 @@
 mod hal;
 
 macro_rules! define_chipset {
-    ({ $($variant:ident = $value:expr),* $(,)* }) =>
+    ({ $($variant:ident = $value:path),* $(,)* }) =>
     {
         /// Enum representation of the GPU chipset.
         #[derive(fmt::Debug, Copy, Clone, PartialOrd, Ord, PartialEq, Eq)]
-        pub(crate) enum Chipset {
-            $($variant = $value),*,
+        pub enum Chipset {
+            $($variant = $value as isize),*,
         }
 
         impl Chipset {
@@ -82,39 +83,39 @@ fn try_from(value: u32) -> Result<Self, Self::Error> {
 
 define_chipset!({
     // Turing
-    TU102 = 0x162,
-    TU104 = 0x164,
-    TU106 = 0x166,
-    TU117 = 0x167,
-    TU116 = 0x168,
+    TU102 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_TU102,
+    TU104 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_TU104,
+    TU106 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_TU106,
+    TU117 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_TU117,
+    TU116 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_TU116,
     // Ampere
-    GA100 = 0x170,
-    GA102 = 0x172,
-    GA103 = 0x173,
-    GA104 = 0x174,
-    GA106 = 0x176,
-    GA107 = 0x177,
+    GA100 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GA100,
+    GA102 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GA102,
+    GA103 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GA103,
+    GA104 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GA104,
+    GA106 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GA106,
+    GA107 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GA107,
     // Hopper
-    GH100 = 0x180,
+    GH100 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GH100,
     // Ada
-    AD102 = 0x192,
-    AD103 = 0x193,
-    AD104 = 0x194,
-    AD106 = 0x196,
-    AD107 = 0x197,
+    AD102 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_AD102,
+    AD103 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_AD103,
+    AD104 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_AD104,
+    AD106 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_AD106,
+    AD107 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_AD107,
     // Blackwell GB10x
-    GB100 = 0x1a0,
-    GB102 = 0x1a2,
+    GB100 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GB100,
+    GB102 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GB102,
     // Blackwell GB20x
-    GB202 = 0x1b2,
-    GB203 = 0x1b3,
-    GB205 = 0x1b5,
-    GB206 = 0x1b6,
-    GB207 = 0x1b7,
+    GB202 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GB202,
+    GB203 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GB203,
+    GB205 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GB205,
+    GB206 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GB206,
+    GB207 = uapi::drm_nova_chipset_NOVA_DRM_CHIPSET_GB207,
 });
 
 impl Chipset {
-    pub(crate) const fn arch(self) -> Architecture {
+    pub const fn arch(self) -> Architecture {
         match self {
             Self::TU102 | Self::TU104 | Self::TU106 | Self::TU117 | Self::TU116 => {
                 Architecture::Turing
@@ -172,7 +173,7 @@ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
 bounded_enum! {
     /// Enum representation of the GPU generation.
     #[derive(fmt::Debug, Copy, Clone)]
-    pub(crate) enum Architecture with TryFrom<Bounded<u32, 6>> {
+    pub enum Architecture with TryFrom<Bounded<u32, 6>> {
         Turing = 0x16,
         Ampere = 0x17,
         Hopper = 0x18,
@@ -206,7 +207,7 @@ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
 /// Structure holding a basic description of the GPU: `Chipset` and `Revision`.
 #[derive(Clone, Copy)]
 pub(crate) struct Spec {
-    chipset: Chipset,
+    pub(crate) chipset: Chipset,
     revision: Revision,
 }
 
@@ -286,7 +287,7 @@ struct GspResources<'gpu> {
 /// Structure holding the resources required to operate the GPU.
 #[pin_data]
 pub(crate) struct Gpu<'gpu> {
-    spec: Spec,
+    pub(crate) spec: Spec,
     /// Static GPU information as provided by the GSP.
     gsp_static_info: GetGspStaticInfoReply,
     /// GSP and its resources.
diff --git a/include/uapi/drm/nova_drm.h b/include/uapi/drm/nova_drm.h
index 3ca90ed9d2bb..0382a4a70640 100644
--- a/include/uapi/drm/nova_drm.h
+++ b/include/uapi/drm/nova_drm.h
@@ -25,6 +25,46 @@ extern "C" {
  */
 #define NOVA_GETPARAM_VRAM_BAR_SIZE	0x1
 
+/*
+ * NOVA_GETPARAM_GPU_CHIPSET
+ *
+ * Query the GPU chipset architecture/implementation.
+ */
+#define NOVA_GETPARAM_GPU_CHIPSET	0x2
+
+enum drm_nova_chipset {
+	/* Turing */
+	NOVA_DRM_CHIPSET_TU102 = 0x162,
+	NOVA_DRM_CHIPSET_TU104 = 0x164,
+	NOVA_DRM_CHIPSET_TU106 = 0x166,
+	NOVA_DRM_CHIPSET_TU117 = 0x167,
+	NOVA_DRM_CHIPSET_TU116 = 0x168,
+	/* Ampere */
+	NOVA_DRM_CHIPSET_GA100 = 0x170,
+	NOVA_DRM_CHIPSET_GA102 = 0x172,
+	NOVA_DRM_CHIPSET_GA103 = 0x173,
+	NOVA_DRM_CHIPSET_GA104 = 0x174,
+	NOVA_DRM_CHIPSET_GA106 = 0x176,
+	NOVA_DRM_CHIPSET_GA107 = 0x177,
+	/* Hopper */
+	NOVA_DRM_CHIPSET_GH100 = 0x180,
+	/* Ada */
+	NOVA_DRM_CHIPSET_AD102 = 0x192,
+	NOVA_DRM_CHIPSET_AD103 = 0x193,
+	NOVA_DRM_CHIPSET_AD104 = 0x194,
+	NOVA_DRM_CHIPSET_AD106 = 0x196,
+	NOVA_DRM_CHIPSET_AD107 = 0x197,
+	/* Blackwell GB10x */
+	NOVA_DRM_CHIPSET_GB100 = 0x1a0,
+	NOVA_DRM_CHIPSET_GB102 = 0x1a2,
+	/* Blackwell GB20x */
+	NOVA_DRM_CHIPSET_GB202 = 0x1b2,
+	NOVA_DRM_CHIPSET_GB203 = 0x1b3,
+	NOVA_DRM_CHIPSET_GB205 = 0x1b5,
+	NOVA_DRM_CHIPSET_GB206 = 0x1b6,
+	NOVA_DRM_CHIPSET_GB207 = 0x1b7,
+};
+
 /**
  * struct drm_nova_getparam - query GPU and driver metadata
  */
-- 
2.54.0