From: sashiko-bot@kernel.org
To: "Chaitanya Kumar Borah" <chaitanya.kumar.borah@intel.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [v5 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX
Date: Mon, 20 Jul 2026 05:22:14 +0000 [thread overview]
Message-ID: <20260720052214.A13D91F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260720045131.971650-2-chaitanya.kumar.borah@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Validation of the 64-bit `supported_fm` mask uses the 32-bit `BIT()` macro, causing invalid bits in the upper 32 bits to silently bypass validation on 32-bit architectures.
--
--- Patch [1]: [v5 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX ---
commit 25b997b331b57b2649988bc81ff156f876274b02
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/colorop: Add DRM_COLOROP_FIXED_MATRIX
Introduce DRM_COLOROP_FIXED_MATRIX, a new colorop type representing a
hardware that performs a fixed matrix operation. Userspace selects one of
the predefined hardware modes via a new FIXED_MATRIX_TYPE enum property.
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index 682fcc6515259..483defad699c0 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
[ ... ]
> @@ -453,6 +462,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
[ ... ]
> +int drm_plane_colorop_fixed_matrix_init(struct drm_device *dev, struct drm_colorop *colorop,
> + struct drm_plane *plane,
> + const struct drm_colorop_funcs *funcs,
> + u64 supported_fm, uint32_t flags)
> +{
> + struct drm_prop_enum_list enum_list[DRM_COLOROP_FM_COUNT];
> + int i, len;
> + struct drm_property *prop;
> + int ret;
> +
> + if (!supported_fm) {
> + drm_err(dev,
> + "No supported FM type op for new Fixed Matrix colorop on [PLANE:%d:%s]\n",
> + plane->base.id, plane->name);
> + return -EINVAL;
> + }
> +
> + if ((supported_fm & -BIT(DRM_COLOROP_FM_COUNT)) != 0) {
[Severity: Medium]
Since supported_fm is a u64, could using the 32-bit BIT() macro here cause
validation issues on 32-bit architectures?
On 32-bit architectures, BIT() evaluates to an unsigned long (32 bits). When
negated and then promoted to u64 for the bitwise AND with supported_fm, it
zero-extends the upper 32 bits (e.g., 0x00000000FFFFFFE0ULL). This means any
invalid bits set in the upper 32 bits of supported_fm would be zeroed out
during the operation and silently bypass this validation check.
Would it be better to use BIT_ULL(DRM_COLOROP_FM_COUNT) or GENMASK_ULL to
ensure the mask is properly validated across its entire 64-bit range?
> + drm_err(dev, "Unknown Fixed Matrix provided on [PLANE:%d:%s]\n",
> + plane->base.id, plane->name);
> + return -EINVAL;
> + }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260720045131.971650-1-chaitanya.kumar.borah@intel.com?part=1
next prev parent reply other threads:[~2026-07-20 5:22 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 4:51 [v5 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
2026-07-20 5:22 ` sashiko-bot [this message]
2026-07-20 4:51 ` [v5 02/14] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
2026-07-20 5:33 ` sashiko-bot
2026-07-20 4:51 ` [v5 03/14] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 04/14] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 05/14] drm/i915/display: Track CSC mode in intel plane state Chaitanya Kumar Borah
2026-07-20 5:28 ` sashiko-bot
2026-07-20 4:51 ` [v5 06/14] drm/i915/display: Program input CSC on SDR planes Chaitanya Kumar Borah
2026-07-20 5:27 ` sashiko-bot
2026-07-20 4:51 ` [v5 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
2026-07-20 5:28 ` sashiko-bot
2026-07-20 4:51 ` [v5 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
2026-07-20 5:29 ` sashiko-bot
2026-07-20 4:51 ` [v5 09/14] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
2026-07-20 5:28 ` sashiko-bot
2026-07-20 4:51 ` [v5 10/14] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 11/14] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 12/14] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-07-20 4:51 ` [v5 14/14] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-07-20 5:39 ` sashiko-bot
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