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From: sashiko-bot@kernel.org
To: "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com>
Cc: robh@kernel.org, conor+dt@kernel.org,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v8 11/13] drm/mediatek: mtk_dsi: Enable PM Runtime on probe
Date: Tue, 15 Sep 2026 09:10:15 +0000	[thread overview]
Message-ID: <20260915091015.DA68F1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260915084148.11385-12-angelogioacchino.delregno@collabora.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/mediatek: DSI device is never resumed causing bus hangs
--

commit 6c75df0d91773376b0709ec5e7caceb104ea2e16
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

    drm/mediatek: mtk_dsi: Enable PM Runtime on probe
    
    Enable PM Runtime at the end of mtk_dsi_probe() so that the
    mediatek-drm mtk_ddp_comp_power_on() function is able to do
    pm_runtime_resume_and_get() and, analogously, the function
    mtk_ddp_comp_power_off() to pm_runtime_put() for the DSI
    device.
    
    This makes sure that the power domains for the DSI IP are
    turned on and off when necessary.
    
    Reviewed-by: CK Hu <ck.hu@mediatek.com>
    Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

>     Enable PM Runtime at the end of mtk_dsi_probe() so that the
>     mediatek-drm mtk_ddp_comp_power_on() function is able to do
>     pm_runtime_resume_and_get() and, analogously, the function
>     mtk_ddp_comp_power_off() to pm_runtime_put() for the DSI
>     device.

[Severity: High]
Will mtk_ddp_comp_power_on() actually resume the DSI device?

Looking at mtk_crtc_atomic_enable() in drivers/gpu/drm/mediatek/mtk_crtc.c,
mtk_ddp_comp_power_on() is only called for the first pipeline component:

mtk_crtc_atomic_enable() {
    ...
	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
    ...
	ret = mtk_ddp_comp_power_on(comp);
    ...
}

Because the DSI device is at the end of the pipeline rather than the first
component, it won't be resumed here.

> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 6f176515e2587..4355103725cf6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -1734,6 +1734,10 @@ static int mtk_dsi_probe(struct platform_device *pdev)
>  	if (ret)
>  		return dev_err_probe(&pdev->dev, ret, "Failed to request DSI irq\n");
>  
> +	ret = devm_pm_runtime_enable(dev);
> +	if (ret)
> +		return ret;
> +

[Severity: High]
Since PM runtime leaves the device in a suspended state by default, won't this
cause bus hangs or system error crashes when accessing hardware registers?

Furthermore, DRM atomic helpers call bridge atomic_pre_enable() callbacks
before CRTC atomic_enable() callbacks. This means mtk_dsi_host_transfer()
in drivers/gpu/drm/mediatek/mtk_dsi.c will attempt to write to hardware
registers before any CRTC-level power-on is attempted:

mtk_dsi_host_transfer() {
    ...
	dsi_mode = readl(dsi->regs + dsi->driver_data->reg_main[DSI_MODE_CTRL]);
    ...
}

Will this result in accessing a powered-off PM domain?

>  	ret = mipi_dsi_host_register(&dsi->host);
>  	if (ret < 0)
>  		return dev_err_probe(dev, ret, "Failed to register DSI host\n");

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260915084148.11385-1-angelogioacchino.delregno@collabora.com?part=11

  reply	other threads:[~2026-09-15  9:10 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15  8:41 [PATCH v8 00/13] drm/mediatek: Add DSC, WDMA, MT8189/96 DSI support AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 01/13] dt-bindings: display: mediatek: dsc: Add MT8196 compatible AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 02/13] drm/mediatek: Implement Display Stream Compression support AngeloGioacchino Del Regno
2026-09-15  8:58   ` sashiko-bot
2026-09-15 13:37   ` Nikolai Burov
2026-09-15 13:55   ` Nikolai Burov
2026-09-15 15:05     ` AngeloGioacchino Del Regno
2026-09-15 18:51       ` Nikolai Burov
2026-09-16 10:57         ` AngeloGioacchino Del Regno
2026-09-19 10:07           ` Nikolai Burov
2026-09-15  8:41 ` [PATCH v8 03/13] dt-bindings: display: mediatek: dsi: Document MT8189 and MT8196 AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 04/13] drm/mediatek: mtk_dsi: Cleanup encoder if reset fails during bind AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 05/13] drm/mediatek: mtk_dsi: Enable interrupt at component bind time AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 06/13] drm/mediatek: mtk_dsi: Transfer register offsets to per-SoC const AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 07/13] drm/mediatek: mtk_dsi: Move max link rate parameter to platform data AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 08/13] drm/mediatek: mtk_dsi: Add support for MT8189 AngeloGioacchino Del Regno
2026-09-15  8:41 ` [PATCH v8 09/13] drm/mediatek: mtk_dsi: Add support for SRAM QoS setting AngeloGioacchino Del Regno
2026-09-15  8:54   ` sashiko-bot
2026-09-15  8:41 ` [PATCH v8 10/13] drm/mediatek: mtk_dsi: Add support for MT8196 AngeloGioacchino Del Regno
2026-09-15  8:57   ` sashiko-bot
2026-09-15  8:41 ` [PATCH v8 11/13] drm/mediatek: mtk_dsi: Enable PM Runtime on probe AngeloGioacchino Del Regno
2026-09-15  9:10   ` sashiko-bot [this message]
2026-09-15  8:41 ` [PATCH v8 12/13] dt-bindings: display: mediatek: wdma: Add compatibles for more SoCs AngeloGioacchino Del Regno
2026-09-15  8:57   ` sashiko-bot
2026-09-15  8:41 ` [PATCH v8 13/13] drm/mediatek: Add Write DMA (WDMA) Engine for Writeback support AngeloGioacchino Del Regno
2026-09-15  8:59   ` sashiko-bot

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