From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B453ECAAA1 for ; Mon, 31 Oct 2022 12:51:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A774610E274; Mon, 31 Oct 2022 12:51:45 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 773C010E271; Mon, 31 Oct 2022 12:51:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667220701; x=1698756701; h=message-id:date:mime-version:subject:from:to:cc: references:in-reply-to:content-transfer-encoding; bh=xg3x51v6/NyqQrUWpFEQ560y9ccM5JwA+A9A3qcNpVI=; b=Y2y+l7tF/IUph8N1QXRAqrdbO7yRvseI6c41z1T9oKwr/9/WskGC+bOX 62k8vtFocugSHevm7f4V9TaJUZwfxK2FXlepFTmUxBg6Ob87u4HTJV9Y0 oKQLLEJcvCwEbIqA56Jj8eDz+ld1F6zjBr8nqnZg+q1DuGrIzigcIjVjq BD+AOXQjlObe7aGVomqSd+/LUlE7PtDgicWGicUycoRlSsw29bJ00Ppgp lkpwjE9jDEWVMlCMwNDnnr/QOqNdCkWtTMDt8PgmOY3NP38cWtAJEbgxQ yeZyDXTpMdYymyK8yxIlsT1wQ+vg73PrAVjapxMu6kC7kq2ZHaSk+2251 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10516"; a="309975950" X-IronPort-AV: E=Sophos;i="5.95,227,1661842800"; d="scan'208";a="309975950" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2022 05:51:40 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10516"; a="808541792" X-IronPort-AV: E=Sophos;i="5.95,227,1661842800"; d="scan'208";a="808541792" Received: from aawaisi-mobl1.ger.corp.intel.com (HELO [10.213.221.7]) ([10.213.221.7]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2022 05:51:39 -0700 Message-ID: <2e7cf7c4-76cb-5a69-8a61-7d1da3577060@linux.intel.com> Date: Mon, 31 Oct 2022 12:51:30 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Don't deadlock busyness stats vs reset Content-Language: en-US From: Tvrtko Ursulin To: John.C.Harrison@Intel.com, Intel-GFX@Lists.FreeDesktop.Org References: <20221028194649.1130223-1-John.C.Harrison@Intel.com> <20221028194649.1130223-3-John.C.Harrison@Intel.com> <56a6c98a-069c-77b0-d6c5-4575bc324075@linux.intel.com> Organization: Intel Corporation UK Plc In-Reply-To: <56a6c98a-069c-77b0-d6c5-4575bc324075@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: DRI-Devel@Lists.FreeDesktop.Org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 31/10/2022 10:09, Tvrtko Ursulin wrote: > > On 28/10/2022 20:46, John.C.Harrison@Intel.com wrote: >> From: John Harrison >> >> The engine busyness stats has a worker function to do things like >> 64bit extend the 32bit hardware counters. The GuC's reset prepare >> function flushes out this worker function to ensure no corruption >> happens during the reset. Unforunately, the worker function has an >> infinite wait for active resets to finish before doing its work. Thus >> a deadlock would occur if the worker function had actually started >> just as the reset starts. >> >> Update the worker to abort if a reset is in progress rather than >> waiting for it to complete. It will still acquire the reset lock in >> the case where a reset was not already in progress. So the processing >> is still safe from corruption, but the deadlock can no longer occur. >> >> Signed-off-by: John Harrison >> --- >>   drivers/gpu/drm/i915/gt/intel_reset.c             | 15 ++++++++++++++- >>   drivers/gpu/drm/i915/gt/intel_reset.h             |  1 + >>   drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c |  6 ++++-- >>   3 files changed, 19 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c >> b/drivers/gpu/drm/i915/gt/intel_reset.c >> index 3159df6cdd492..2f48c6e4420ea 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_reset.c >> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c >> @@ -1407,7 +1407,7 @@ void intel_gt_handle_error(struct intel_gt *gt, >>       intel_runtime_pm_put(gt->uncore->rpm, wakeref); >>   } >> -int intel_gt_reset_trylock(struct intel_gt *gt, int *srcu) >> +static int _intel_gt_reset_trylock(struct intel_gt *gt, int *srcu, >> bool retry) >>   { >>       might_lock(>->reset.backoff_srcu); >>       might_sleep(); >> @@ -1416,6 +1416,9 @@ int intel_gt_reset_trylock(struct intel_gt *gt, >> int *srcu) >>       while (test_bit(I915_RESET_BACKOFF, >->reset.flags)) { >>           rcu_read_unlock(); >> +        if (!retry) >> +            return -EBUSY; >> + >>           if (wait_event_interruptible(gt->reset.queue, >>                            !test_bit(I915_RESET_BACKOFF, >>                                  >->reset.flags))) > > Would it be more obvious to rename the existing semantics to > intel_gt_reset_interruptible(), while the flavour you add in this patch > truly is trylock? I am not sure, since it's all a bit special, but > trylock sure feels confusing if it can sleep forever... Oh and might_sleep() shouldn't be there with the trylock version - I mean any flavour of the real trylock. Regards, Tvrtko