Re: [PATCH] accel/ivpu/37xx: Fix interrupt_clear_with_0 WA initialization

[Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>]

Applied to drm-misc-fixes

On 04.12.2023 13:23, Jacek Lawrynowicz wrote:
> From: Andrzej Kacprowski <Andrzej.Kacprowski@intel.com>
> 
> Using PCI Device ID/Revision to initialize the interrupt_clear_with_0
> workaround is problematic - there are many pre-production
> steppings with different behavior, even with the same PCI ID/Revision
> 
> Instead of checking for PCI Device ID/Revision, check the VPU
> buttress interrupt status register behavior - if this register
> is not zero after writing 1s it means there register is RW
> instead of RW1C and we need to enable the interrupt_clear_with_0
> workaround.
> 
> Fixes: 7f34e01f77f8 ("accel/ivpu: Clear specific interrupt status bits on C0")
> Signed-off-by: Andrzej Kacprowski <Andrzej.Kacprowski@intel.com>
> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
> ---
>  drivers/accel/ivpu/ivpu_hw_37xx.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/accel/ivpu/ivpu_hw_37xx.c b/drivers/accel/ivpu/ivpu_hw_37xx.c
> index 4ccf1994b97a..d530384f8d60 100644
> --- a/drivers/accel/ivpu/ivpu_hw_37xx.c
> +++ b/drivers/accel/ivpu/ivpu_hw_37xx.c
> @@ -53,10 +53,12 @@
>  
>  #define ICB_0_1_IRQ_MASK ((((u64)ICB_1_IRQ_MASK) << 32) | ICB_0_IRQ_MASK)
>  
> -#define BUTTRESS_IRQ_MASK ((REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE)) | \
> -			   (REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR)) | \
> +#define BUTTRESS_IRQ_MASK ((REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR)) | \
>  			   (REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, UFI_ERR)))
>  
> +#define BUTTRESS_ALL_IRQ_MASK (BUTTRESS_IRQ_MASK | \
> +			       (REG_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE)))
> +
>  #define BUTTRESS_IRQ_ENABLE_MASK ((u32)~BUTTRESS_IRQ_MASK)
>  #define BUTTRESS_IRQ_DISABLE_MASK ((u32)-1)
>  
> @@ -74,8 +76,12 @@ static void ivpu_hw_wa_init(struct ivpu_device *vdev)
>  	vdev->wa.clear_runtime_mem = false;
>  	vdev->wa.d3hot_after_power_off = true;
>  
> -	if (ivpu_device_id(vdev) == PCI_DEVICE_ID_MTL && ivpu_revision(vdev) < 4)
> +	REGB_WR32(VPU_37XX_BUTTRESS_INTERRUPT_STAT, BUTTRESS_ALL_IRQ_MASK);
> +	if (REGB_RD32(VPU_37XX_BUTTRESS_INTERRUPT_STAT) == BUTTRESS_ALL_IRQ_MASK) {
> +		/* Writing 1s does not clear the interrupt status register */
>  		vdev->wa.interrupt_clear_with_0 = true;
> +		REGB_WR32(VPU_37XX_BUTTRESS_INTERRUPT_STAT, 0x0);
> +	}
>  
>  	IVPU_PRINT_WA(punit_disabled);
>  	IVPU_PRINT_WA(clear_runtime_mem);