From mboxrd@z Thu Jan 1 00:00:00 1970 From: Todd Previte Subject: Re: [Intel-gfx] [PATCH 03/11] drm/i915: add some registers need for displayport MST support. Date: Thu, 22 May 2014 21:22:47 -0700 Message-ID: <537ECD17.7050307@gmail.com> References: <1400640904-16847-1-git-send-email-airlied@gmail.com> <1400640904-16847-4-git-send-email-airlied@gmail.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0169525279==" Return-path: In-Reply-To: <1400640904-16847-4-git-send-email-airlied@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Dave Airlie Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org This is a multi-part message in MIME format. --===============0169525279== Content-Type: multipart/alternative; boundary="------------090402010607070304000805" This is a multi-part message in MIME format. --------------090402010607070304000805 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit > Dave Airlie > Tuesday, May 20, 2014 7:54 PM > From: Dave Airlie > > These are just from the Haswell spec. > > Signed-off-by: Dave Airlie > --- > drivers/gpu/drm/i915/i915_reg.h | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h > index 8f84555..557b37a 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5386,6 +5386,7 @@ enum punit_power_well { > #define TRANS_DDI_EDP_INPUT_A_ONOFF (4<<12) > #define TRANS_DDI_EDP_INPUT_B_ONOFF (5<<12) > #define TRANS_DDI_EDP_INPUT_C_ONOFF (6<<12) > +#define TRANS_DDI_DP_VC_PAYLOAD_ALLOC (1<<8) > #define TRANS_DDI_BFI_ENABLE (1<<4) > > /* DisplayPort Transport Control */ > @@ -5395,6 +5396,7 @@ enum punit_power_well { > #define DP_TP_CTL_ENABLE (1<<31) > #define DP_TP_CTL_MODE_SST (0<<27) > #define DP_TP_CTL_MODE_MST (1<<27) > +#define DP_TP_CTL_FORCE_ACT (1<<25) > #define DP_TP_CTL_ENHANCED_FRAME_ENABLE (1<<18) > #define DP_TP_CTL_FDI_AUTOTRAIN (1<<15) > #define DP_TP_CTL_LINK_TRAIN_MASK (7<<8) > @@ -5409,8 +5411,13 @@ enum punit_power_well { > #define DP_TP_STATUS_A 0x64044 > #define DP_TP_STATUS_B 0x64144 > #define DP_TP_STATUS(port) _PORT(port, DP_TP_STATUS_A, DP_TP_STATUS_B) > -#define DP_TP_STATUS_IDLE_DONE (1<<25) > -#define DP_TP_STATUS_AUTOTRAIN_DONE (1<<12) > +#define DP_TP_STATUS_IDLE_DONE (1<<25) > +#define DP_TP_STATUS_ACT_SENT (1<<24) > +#define DP_TP_STATUS_MODE_STATUS_MST (1<<23) > +#define DP_TP_STATUS_AUTOTRAIN_DONE (1<<12) > +#define DP_TP_STATUS_PAYLOAD_MAPPING_VC2 (3 << 8) > +#define DP_TP_STATUS_PAYLOAD_MAPPING_VC1 (3 << 4) > +#define DP_TP_STATUS_PAYLOAD_MAPPING_VC0 (3 << 0) > > /* DDI Buffer Control */ > #define DDI_BUF_CTL_A 0x64000 Definitions look correct. If I noticed any discrepancies during testing, I'll flag it. Reviewed-by: Todd Previte > Dave Airlie > Tuesday, May 20, 2014 7:54 PM > Hey, > > So this set is pretty close to what I think we should be merging > initially, > > Since the last set, it makes fbcon and suspend/resume work a lot better, > > I've also fixed a couple of bugs in -intel that make things work a lot > better. > > I've bashed on this a bit using kms-flip from intel-gpu-tools, hacked > to add 3 monitor support. > > It still generates a fair few i915 state checker backtraces, and some > of them are fairly hard to work out, it might be we should just tone > down the state checker for encoders/connectors with no actual hw backing > them. > > Dave. > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx --------------090402010607070304000805 Content-Type: multipart/related; boundary="------------050703090308020408080402" --------------050703090308020408080402 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit

Tuesday, May 20, 2014 7:54 PM
From: Dave Airlie <airlied@redhat.com>

These are just from the Haswell spec.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/i915_reg.h | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8f84555..557b37a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5386,6 +5386,7 @@ enum punit_power_well {
#define TRANS_DDI_EDP_INPUT_A_ONOFF (4<<12)
#define TRANS_DDI_EDP_INPUT_B_ONOFF (5<<12)
#define TRANS_DDI_EDP_INPUT_C_ONOFF (6<<12)
+#define TRANS_DDI_DP_VC_PAYLOAD_ALLOC (1<<8)
#define TRANS_DDI_BFI_ENABLE (1<<4)

/* DisplayPort Transport Control */
@@ -5395,6 +5396,7 @@ enum punit_power_well {
#define DP_TP_CTL_ENABLE (1<<31)
#define DP_TP_CTL_MODE_SST (0<<27)
#define DP_TP_CTL_MODE_MST (1<<27)
+#define DP_TP_CTL_FORCE_ACT (1<<25)
#define DP_TP_CTL_ENHANCED_FRAME_ENABLE (1<<18)
#define DP_TP_CTL_FDI_AUTOTRAIN (1<<15)
#define DP_TP_CTL_LINK_TRAIN_MASK (7<<8)
@@ -5409,8 +5411,13 @@ enum punit_power_well {
#define DP_TP_STATUS_A 0x64044
#define DP_TP_STATUS_B 0x64144
#define DP_TP_STATUS(port) _PORT(port, DP_TP_STATUS_A, DP_TP_STATUS_B)
-#define DP_TP_STATUS_IDLE_DONE (1<<25)
-#define DP_TP_STATUS_AUTOTRAIN_DONE (1<<12)
+#define DP_TP_STATUS_IDLE_DONE (1<<25)
+#define DP_TP_STATUS_ACT_SENT (1<<24)
+#define DP_TP_STATUS_MODE_STATUS_MST (1<<23)
+#define DP_TP_STATUS_AUTOTRAIN_DONE (1<<12)
+#define DP_TP_STATUS_PAYLOAD_MAPPING_VC2 (3 << 8)
+#define DP_TP_STATUS_PAYLOAD_MAPPING_VC1 (3 << 4)
+#define DP_TP_STATUS_PAYLOAD_MAPPING_VC0 (3 << 0)

/* DDI Buffer Control */
#define DDI_BUF_CTL_A 0x64000
Definitions look correct. If I noticed any discrepancies during testing, I'll flag it.

Reviewed-by: Todd Previte <tprevite@gmail.com>
Tuesday, May 20, 2014 7:54 PM
Hey,

So this set is pretty close to what I think we should be merging initially,

Since the last set, it makes fbcon and suspend/resume work a lot better,

I've also fixed a couple of bugs in -intel that make things work a lot
better.

I've bashed on this a bit using kms-flip from intel-gpu-tools, hacked
to add 3 monitor support.

It still generates a fair few i915 state checker backtraces, and some
of them are fairly hard to work out, it might be we should just tone
down the state checker for encoders/connectors with no actual hw backing
them.

Dave.

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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