From: "Michel Dänzer" <michel@daenzer.net>
To: Alex Deucher <alexdeucher@gmail.com>
Cc: Maling list - DRI developers <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH] drm/radeon: Always flush VM again on < CIK
Date: Fri, 08 Aug 2014 11:38:55 +0900 [thread overview]
Message-ID: <53E4383F.8040806@daenzer.net> (raw)
In-Reply-To: <CADnq5_N34R1kEJyjpZgAX239CBsYepDtqOVg9cU5C3_pVeCu6Q@mail.gmail.com>
On 08.08.2014 00:55, Alex Deucher wrote:
>
> Note that there is no PFP (or CE) on the compute queues so we can't
> use PFP (or CE) for compute.
AFAICT cik_hdp_flush_cp_ring_emit() always uses the PFP though.
> Note also that the engine bit is not always consistent (for some packets 0
> = ME, 1 = PFP and for others 1= ME and 0 = PFP).
Ugh. Then we should probably use explicit *_ENGINE_PFP/ME macros instead
of *_ENGINE(lucky_number). :)
>> On Thu, Aug 7, 2014 at 3:59 PM, Alex Deucher <alexdeucher@gmail.com> wrote:
>>>
>>> We should be using PFP as much as possible. Does the attached patch help?
Unfortunately not.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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next prev parent reply other threads:[~2014-08-08 2:38 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-07 7:46 [PATCH] drm/radeon: Always flush VM again on < CIK Michel Dänzer
2014-08-07 13:59 ` Alex Deucher
2014-08-07 15:38 ` Marek Olšák
2014-08-07 15:47 ` Christian König
2014-08-07 15:55 ` Alex Deucher
2014-08-08 2:38 ` Michel Dänzer [this message]
2014-08-08 8:44 ` Christian König
2014-08-08 8:50 ` Michel Dänzer
2014-08-08 13:31 ` Alex Deucher
2014-08-08 13:34 ` Alex Deucher
2014-08-11 8:42 ` Michel Dänzer
2014-08-11 15:00 ` Alex Deucher
2014-08-12 9:05 ` Christian König
2014-08-15 14:52 ` Christian König
2014-08-18 9:10 ` Michel Dänzer
2014-08-18 9:44 ` Christian König
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