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[96.230.249.157]) by smtp.gmail.com with ESMTPSA id 125sm2696134qkf.95.2021.10.12.15.09.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Oct 2021 15:09:54 -0700 (PDT) Message-ID: <5eb5d41847fc13e418b4a7964fe305fdf4a65fc9.camel@redhat.com> Subject: Re: [PATCH] drm: Update MST First Link Slot Information Based on Encoding Format From: Lyude Paul To: "Lakha, Bhawanpreet" , "Zuo, Jerry" , "dri-devel@lists.freedesktop.org" Cc: "Wentland, Harry" , "Lin, Wayne" , "Kazlauskas, Nicholas" Date: Tue, 12 Oct 2021 18:09:51 -0400 In-Reply-To: References: <5e463fbc3d633eea1078e838ba5be0065ffbeb1e.camel@redhat.com> <20211012215848.1507023-1-Bhawanpreet.Lakha@amd.com> Organization: Red Hat User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=lyude@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: multipart/alternative; boundary="=-IS1JWVDl8SN9TBIg44Fe" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" --=-IS1JWVDl8SN9TBIg44Fe Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit No problem, thanks for the patches! Will take a look at this tomorrow On Tue, 2021-10-12 at 22:02 +0000, Lakha, Bhawanpreet wrote: > [AMD Official Use Only] > > Hi Lyude, > > Jerry is busy these few weeks so I will be taking a look at this. I added > the start/total slots to the mst_state and am updating them in atomic_check. > > Also ignore the V2 "* Remove get_mst_link_encoding_cap" I got a bit lost in > trying to figure out the patch layout that was sent before. > > > Thanks, > Bhawan > > From: Bhawanpreet Lakha > Sent: October 12, 2021 5:58 PM > To: Zuo, Jerry ; dri-devel@lists.freedesktop.org devel@lists.freedesktop.org>; lyude@redhat.com > Cc: Wentland, Harry ; Lin, Wayne > ; Kazlauskas, Nicholas ; > Lakha, Bhawanpreet > Subject: [PATCH] drm: Update MST First Link Slot Information Based on > Encoding Format  > 8b/10b encoding format requires to reserve the first slot for > recording metadata. Real data transmission starts from the second slot, > with a total of available 63 slots available. > > In 128b/132b encoding format, metadata is transmitted separately > in LLCP packet before MTP. Real data transmission starts from > the first slot, with a total of 64 slots available. > > v2: > * Remove get_mst_link_encoding_cap > * Move total/start slots to mst_state, and copy it to mst_mgr in > atomic_check > > Signed-off-by: Fangzhi Zuo > Signed-off-by: Bhawanpreet Lakha > --- >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 28 +++++++++++++++ >  drivers/gpu/drm/drm_dp_mst_topology.c         | 35 +++++++++++++++---- >  include/drm/drm_dp_mst_helper.h               | 13 +++++++ >  3 files changed, 69 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 5020f2d36fe1..4ad50eb0091a 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -10612,6 +10612,8 @@ static int amdgpu_dm_atomic_check(struct drm_device > *dev, >  #if defined(CONFIG_DRM_AMD_DC_DCN) >          struct dsc_mst_fairness_vars vars[MAX_PIPES]; >  #endif > +       struct drm_dp_mst_topology_state *mst_state; > +       struct drm_dp_mst_topology_mgr *mgr; >   >          trace_amdgpu_dm_atomic_check_begin(state); >   > @@ -10819,6 +10821,32 @@ static int amdgpu_dm_atomic_check(struct drm_device > *dev, >                  lock_and_validation_needed = true; >          } >   > +#if defined(CONFIG_DRM_AMD_DC_DCN) > +       for_each_new_mst_mgr_in_state(state, mgr, mst_state, i) { > +               struct amdgpu_dm_connector *aconnector; > +               struct drm_connector *connector; > +               struct drm_connector_list_iter iter; > +               u8 link_coding_cap; > + > +               if (!mgr->mst_state ) > +                       continue; > + > +               drm_connector_list_iter_begin(dev, &iter); > +               drm_for_each_connector_iter(connector, &iter) { > +                       int id = connector->index; > + > +                       if (id == mst_state->mgr->conn_base_id) { > +                               aconnector = > to_amdgpu_dm_connector(connector); > +                               link_coding_cap = > dc_link_dp_mst_decide_link_encoding_format(aconnector->dc_link); > +                               drm_dp_mst_update_coding_cap(mst_state, > link_coding_cap); > + > +                               break; > +                       } > +               } > +               drm_connector_list_iter_end(&iter); > + > +       } > +#endif >          /** >           * Streams and planes are reset when there are changes that affect >           * bandwidth. Anything that affects bandwidth needs to go through > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c > b/drivers/gpu/drm/drm_dp_mst_topology.c > index ad0795afc21c..fb5c47c4cb2e 100644 > --- a/drivers/gpu/drm/drm_dp_mst_topology.c > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c > @@ -3368,7 +3368,7 @@ int drm_dp_update_payload_part1(struct > drm_dp_mst_topology_mgr *mgr) >          struct drm_dp_payload req_payload; >          struct drm_dp_mst_port *port; >          int i, j; > -       int cur_slots = 1; > +       int cur_slots = mgr->start_slot; >          bool skip; >   >          mutex_lock(&mgr->payload_lock); > @@ -4321,7 +4321,7 @@ int drm_dp_find_vcpi_slots(struct > drm_dp_mst_topology_mgr *mgr, >          num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div); >   >          /* max. time slots - one slot for MTP header */ > -       if (num_slots > 63) > +       if (num_slots > mgr->total_avail_slots) >                  return -ENOSPC; >          return num_slots; >  } > @@ -4333,7 +4333,7 @@ static int drm_dp_init_vcpi(struct > drm_dp_mst_topology_mgr *mgr, >          int ret; >   >          /* max. time slots - one slot for MTP header */ > -       if (slots > 63) > +       if (slots > mgr->total_avail_slots) >                  return -ENOSPC; >   >          vcpi->pbn = pbn; > @@ -4507,6 +4507,18 @@ int drm_dp_atomic_release_vcpi_slots(struct > drm_atomic_state *state, >  } >  EXPORT_SYMBOL(drm_dp_atomic_release_vcpi_slots); >   > +void drm_dp_mst_update_coding_cap(struct drm_dp_mst_topology_state > *mst_state, uint8_t link_coding_cap) > +{ > +       if (link_coding_cap == DP_CAP_ANSI_128B132B) { > +               mst_state->total_avail_slots = 64; > +               mst_state->start_slot = 0; > +       } > + > +       DRM_DEBUG_KMS("%s coding format on mgr 0x%p\n", > +                       (link_coding_cap == DP_CAP_ANSI_128B132B) ? > "128b/132b":"8b/10b", mst_state->mgr); > +} > +EXPORT_SYMBOL(drm_dp_mst_update_coding_cap); > + >  /** >   * drm_dp_mst_allocate_vcpi() - Allocate a virtual channel >   * @mgr: manager for this port > @@ -4538,8 +4550,8 @@ bool drm_dp_mst_allocate_vcpi(struct > drm_dp_mst_topology_mgr *mgr, >   >          ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn, slots); >          if (ret) { > -               drm_dbg_kms(mgr->dev, "failed to init vcpi slots=%d max=63 > ret=%d\n", > -                           DIV_ROUND_UP(pbn, mgr->pbn_div), ret); > +               drm_dbg_kms(mgr->dev, "failed to init vcpi slots=%d max=%d > ret=%d\n", > +                           DIV_ROUND_UP(pbn, mgr->pbn_div), mgr- > >total_avail_slots, ret); >                  drm_dp_mst_topology_put_port(port); >                  goto out; >          } > @@ -5226,7 +5238,7 @@ drm_dp_mst_atomic_check_vcpi_alloc_limit(struct > drm_dp_mst_topology_mgr *mgr, >                                           struct drm_dp_mst_topology_state > *mst_state) >  { >          struct drm_dp_vcpi_allocation *vcpi; > -       int avail_slots = 63, payload_count = 0; > +       int avail_slots = mgr->total_avail_slots, payload_count = 0; >   >          list_for_each_entry(vcpi, &mst_state->vcpis, next) { >                  /* Releasing VCPI is always OK-even if the port is gone */ > @@ -5255,7 +5267,7 @@ drm_dp_mst_atomic_check_vcpi_alloc_limit(struct > drm_dp_mst_topology_mgr *mgr, >                  } >          } >          drm_dbg_atomic(mgr->dev, "[MST MGR:%p] mst state %p VCPI avail=%d > used=%d\n", > -                      mgr, mst_state, avail_slots, 63 - avail_slots); > +                      mgr, mst_state, avail_slots, mgr->total_avail_slots - > avail_slots); >   >          return 0; >  } > @@ -5421,6 +5433,10 @@ int drm_dp_mst_atomic_check(struct drm_atomic_state > *state) >                          break; >   >                  mutex_lock(&mgr->lock); > + > +               mgr->start_slot = mst_state->start_slot; > +               mgr->total_avail_slots = mst_state->total_avail_slots; > + >                  ret = drm_dp_mst_atomic_check_mstb_bw_limit(mgr- > >mst_primary, >                                                              mst_state); >                  mutex_unlock(&mgr->lock); > @@ -5527,11 +5543,16 @@ int drm_dp_mst_topology_mgr_init(struct > drm_dp_mst_topology_mgr *mgr, >          if (!mgr->proposed_vcpis) >                  return -ENOMEM; >          set_bit(0, &mgr->payload_mask); > +       mgr->total_avail_slots = 63; > +       mgr->start_slot = 1; >   >          mst_state = kzalloc(sizeof(*mst_state), GFP_KERNEL); >          if (mst_state == NULL) >                  return -ENOMEM; >   > +       mst_state->total_avail_slots = 63; > +       mst_state->start_slot = 1; > + >          mst_state->mgr = mgr; >          INIT_LIST_HEAD(&mst_state->vcpis); >   > diff --git a/include/drm/drm_dp_mst_helper.h > b/include/drm/drm_dp_mst_helper.h > index ddb9231d0309..f8152dfb34ed 100644 > --- a/include/drm/drm_dp_mst_helper.h > +++ b/include/drm/drm_dp_mst_helper.h > @@ -554,6 +554,8 @@ struct drm_dp_mst_topology_state { >          struct drm_private_state base; >          struct list_head vcpis; >          struct drm_dp_mst_topology_mgr *mgr; > +       u8 total_avail_slots; > +       u8 start_slot; >  }; >   >  #define to_dp_mst_topology_mgr(x) container_of(x, struct > drm_dp_mst_topology_mgr, base) > @@ -661,6 +663,16 @@ struct drm_dp_mst_topology_mgr { >           */ >          int pbn_div; >   > +       /** > +        * @total_avail_slots: 63 for 8b/10b, 64 for 128/132b > +        */ > +       u8 total_avail_slots; > + > +       /** > +        * @start_slot: 1 for 8b/10b, 0 for 128/132b > +        */ > +       u8 start_slot; > + >          /** >           * @funcs: Atomic helper callbacks >           */ > @@ -806,6 +818,7 @@ int drm_dp_mst_get_vcpi_slots(struct > drm_dp_mst_topology_mgr *mgr, struct drm_dp >   >  void drm_dp_mst_reset_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, > struct drm_dp_mst_port *port); >   > +void drm_dp_mst_update_coding_cap(struct drm_dp_mst_topology_state > *mst_state, uint8_t link_coding_cap); >   >  void drm_dp_mst_deallocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, >                                  struct drm_dp_mst_port *port); -- Cheers, Lyude Paul (she/her) Software Engineer at Red Hat --=-IS1JWVDl8SN9TBIg44Fe Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable
No problem, thanks for the patches! Will take a look= at this tomorrow

On Tue, 2021-10-12 at 22:02 +000= 0, Lakha, Bhawanpreet wrote:

[A= MD Official Use Only]


Hi Lyude,

Jerry is busy these few weeks so I will be taking= a look at this. I added the start/total slots to the mst_state and am upda= ting them in atomic_check.

Also ignore the V2 "* Remove get_mst_link_encoding_cap= " I got a bit lost in trying to figure out the patch layout that was sent b= efore.


Thanks,
Bhawan


From: Bhawanpreet Lakha <Bh= awanpreet.Lakha@amd.com>
Sent: October 12, 2021 5:58 PM
= To: Zuo, Jerry <Jerry.Zuo@amd.com>; dri-devel@lists.freedesktop.o= rg <dri-devel@lists.freedesktop.org>; lyude@redhat.com <lyude@redh= at.com>
Cc: Wentland, Harry <Harry.Wentland@amd.com>; Li= n, Wayne <Wayne.Lin@amd.com>; Kazlauskas, Nicholas <Nicholas.Kazla= uskas@amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>
= Subject: [PATCH] drm: Update MST First Link Slot Information Based o= n Encoding Format
 
=
8= b/10b encoding format requires to reserve the first slot for
recording m= etadata. Real data transmission starts from the second slot,
with a tota= l of available 63 slots available.

In 128b/132b encoding format, met= adata is transmitted separately
in LLCP packet before MTP. Real data tra= nsmission starts from
the first slot, with a total of 64 slots available= .

v2:
* Remove get_mst_link_encoding_cap
* Move total/start sl= ots to mst_state, and copy it to mst_mgr in
atomic_check

Signed-o= ff-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Bhawanpreet = Lakha <Bhawanpreet.Lakha@amd.com>
---
 .../gpu/drm/amd/dis= play/amdgpu_dm/amdgpu_dm.c | 28 +++++++++++++++
 drivers/gpu/drm/dr= m_dp_mst_topology.c         | 35 ++= +++++++++++++----
 include/drm/drm_dp_mst_helper.h   = ;            | 13 ++= +++++
 3 files changed, 69 insertions(+), 7 deletions(-)

dif= f --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/d= rm/amd/display/amdgpu_dm/amdgpu_dm.c
index 5020f2d36fe1..4ad50eb0091a 10= 0644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/dr= ivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -10612,6 +10612,8 @@ = static int amdgpu_dm_atomic_check(struct drm_device *dev,
 #if defi= ned(CONFIG_DRM_AMD_DC_DCN)
       &nb= sp; struct dsc_mst_fairness_vars vars[MAX_PIPES];
 #endif
+ = ;      struct drm_dp_mst_topology_state *mst_state= ;
+       struct drm_dp_mst_topology_mgr *= mgr;
 
         trace_am= dgpu_dm_atomic_check_begin(state);
 
@@ -10819,6 +10821,32 @@ st= atic int amdgpu_dm_atomic_check(struct drm_device *dev,
  &nbs= p;            &= nbsp; lock_and_validation_needed =3D true;
     = ;    }
 
+#if defined(CONFIG_DRM_AMD_DC_DCN)
+=        for_each_new_mst_mgr_in_state(state, m= gr, mst_state, i) {
+        &nb= sp;      struct amdgpu_dm_connector *aconnector;+            =    struct drm_connector *connector;
+    &= nbsp;          struct drm_conn= ector_list_iter iter;
+        &= nbsp;      u8 link_coding_cap;
+
+ &nbs= p;             = if (!mgr->mst_state )
+       &nbs= p;            &= nbsp;  continue;
+
+       &n= bsp;       drm_connector_list_iter_begin(dev,= &iter);
+         &nbs= p;     drm_for_each_connector_iter(connector, &iter= ) {
+           &= nbsp;           int id = =3D connector->index;
+
+       = ;            &n= bsp;   if (id =3D=3D mst_state->mgr->conn_base_id) {
+&n= bsp;            = ;            &n= bsp;     aconnector =3D to_amdgpu_dm_connector(connecto= r);
+           &= nbsp;           &nbs= p;       link_coding_cap =3D dc_link_dp_mst_d= ecide_link_encoding_format(aconnector->dc_link);
+   &= nbsp;           &nbs= p;            &= nbsp;  drm_dp_mst_update_coding_cap(mst_state, link_coding_cap);
+<= br>+            = ;            &n= bsp;      break;
+     = ;            &n= bsp;     }
+      &nbs= p;        }
+    =            drm_connector_= list_iter_end(&iter);
+
+       }+#endif
         /**
 =          * Streams and planes are r= eset when there are changes that affect
     &n= bsp;    * bandwidth. Anything that affects bandwidth needs t= o go through
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/driver= s/gpu/drm/drm_dp_mst_topology.c
index ad0795afc21c..fb5c47c4cb2e 100644<= br>--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm= _dp_mst_topology.c
@@ -3368,7 +3368,7 @@ int drm_dp_update_payload_part1= (struct drm_dp_mst_topology_mgr *mgr)
     &nbs= p;   struct drm_dp_payload req_payload;
   &nbs= p;     struct drm_dp_mst_port *port;
  &nb= sp;      int i, j;
-    &nb= sp;  int cur_slots =3D 1;
+       int= cur_slots =3D mgr->start_slot;
      &= nbsp;  bool skip;
 
      &nb= sp;  mutex_lock(&mgr->payload_lock);
@@ -4321,7 +4321,7 @@ i= nt drm_dp_find_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr,
 &nb= sp;       num_slots =3D DIV_ROUND_UP(pbn, mgr= ->pbn_div);
 
        = ; /* max. time slots - one slot for MTP header */
-   &nb= sp;   if (num_slots > 63)
+     &n= bsp; if (num_slots > mgr->total_avail_slots)
   &nb= sp;            = return -ENOSPC;
         return= num_slots;
 }
@@ -4333,7 +4333,7 @@ static int drm_dp_init_vcpi= (struct drm_dp_mst_topology_mgr *mgr,
     &nbs= p;   int ret;
 
      &n= bsp;  /* max. time slots - one slot for MTP header */
-  =      if (slots > 63)
+    &nb= sp;  if (slots > mgr->total_avail_slots)
   &n= bsp;            = ; return -ENOSPC;
 
       &n= bsp; vcpi->pbn =3D pbn;
@@ -4507,6 +4507,18 @@ int drm_dp_atomic_rele= ase_vcpi_slots(struct drm_atomic_state *state,
 }
 EXPORT_S= YMBOL(drm_dp_atomic_release_vcpi_slots);
 
+void drm_dp_mst_upda= te_coding_cap(struct drm_dp_mst_topology_state *mst_state, uint8_t link_cod= ing_cap)
+{
+       if (link_coding_cap= =3D=3D DP_CAP_ANSI_128B132B) {
+      &nb= sp;        mst_state->total_avail_slo= ts =3D 64;
+          =      mst_state->start_slot =3D 0;
+  &n= bsp;    }
+
+       DRM_= DEBUG_KMS("%s coding format on mgr 0x%p\n",
+    &nb= sp;            =       (link_coding_cap =3D=3D DP_CAP_ANSI_128B132B= ) ? "128b/132b":"8b/10b", mst_state->mgr);
+}
+EXPORT_SYMBOL(drm_d= p_mst_update_coding_cap);
+
 /**
  * drm_dp_mst_allocate= _vcpi() - Allocate a virtual channel
  * @mgr: manager for this por= t
@@ -4538,8 +4550,8 @@ bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_= topology_mgr *mgr,
 
       &= nbsp; ret =3D drm_dp_init_vcpi(mgr, &port->vcpi, pbn, slots);
&nb= sp;        if (ret) {
-  &n= bsp;            drm_= dbg_kms(mgr->dev, "failed to init vcpi slots=3D%d max=3D63 ret=3D%d\n",<= br>-            = ;            &n= bsp;  DIV_ROUND_UP(pbn, mgr->pbn_div), ret);
+   =             drm_dbg_= kms(mgr->dev, "failed to init vcpi slots=3D%d max=3D%d ret=3D%d\n",
+=             &nb= sp;            =   DIV_ROUND_UP(pbn, mgr->pbn_div), mgr->total_avail_slots, ret);=
            = ;     drm_dp_mst_topology_put_port(port);
 &nbs= p;            &= nbsp;  goto out;
         }=
@@ -5226,7 +5238,7 @@ drm_dp_mst_atomic_check_vcpi_alloc_limit(struct d= rm_dp_mst_topology_mgr *mgr,
       &= nbsp;           &nbs= p;            &= nbsp;         struct drm_dp_mst_top= ology_state *mst_state)
 {
      &= nbsp;  struct drm_dp_vcpi_allocation *vcpi;
-   &nbs= p;   int avail_slots =3D 63, payload_count =3D 0;
+  = ;     int avail_slots =3D mgr->total_avail_slots, pa= yload_count =3D 0;
 
       &= nbsp; list_for_each_entry(vcpi, &mst_state->vcpis, next) {
 =             &nb= sp;   /* Releasing VCPI is always OK-even if the port is gone */<= br>@@ -5255,7 +5267,7 @@ drm_dp_mst_atomic_check_vcpi_alloc_limit(struct dr= m_dp_mst_topology_mgr *mgr,
       &n= bsp;         }
   = ;      }
      &n= bsp;  drm_dbg_atomic(mgr->dev, "[MST MGR:%p] mst state %p VCPI avai= l=3D%d used=3D%d\n",
-        &n= bsp;            = ; mgr, mst_state, avail_slots, 63 - avail_slots);
+   &nb= sp;            =       mgr, mst_state, avail_slots, mgr->total_a= vail_slots - avail_slots);
 
      = ;   return 0;
 }
@@ -5421,6 +5433,10 @@ int drm_dp_mst= _atomic_check(struct drm_atomic_state *state)
    &n= bsp;            = ;        break;
 
  = ;            &n= bsp;  mutex_lock(&mgr->lock);
+
+    =            mgr->start_= slot =3D mst_state->start_slot;
+      =          mgr->total_avail_slots = =3D mst_state->total_avail_slots;
+
     =             ret =3D = drm_dp_mst_atomic_check_mstb_bw_limit(mgr->mst_primary,
  &= nbsp;           &nbs= p;            &= nbsp;           &nbs= p;            &= nbsp;        mst_state);
  =             &nb= sp;  mutex_unlock(&mgr->lock);
@@ -5527,11 +5543,16 @@ int d= rm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr,
 &= nbsp;       if (!mgr->proposed_vcpis)
&= nbsp;           &nbs= p;    return -ENOMEM;
      = ;   set_bit(0, &mgr->payload_mask);
+   =     mgr->total_avail_slots =3D 63;
+   =     mgr->start_slot =3D 1;
 
   = ;      mst_state =3D kzalloc(sizeof(*mst_state), G= FP_KERNEL);
         if (mst_sta= te =3D=3D NULL)
         &n= bsp;       return -ENOMEM;
 
+&nbs= p;      mst_state->total_avail_slots =3D 63;+       mst_state->start_slot =3D 1;
+=
         mst_state->mgr =3D = mgr;
         INIT_LIST_HEAD(&am= p;mst_state->vcpis);
 
diff --git a/include/drm/drm_dp_mst_he= lper.h b/include/drm/drm_dp_mst_helper.h
index ddb9231d0309..f8152dfb34e= d 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_= dp_mst_helper.h
@@ -554,6 +554,8 @@ struct drm_dp_mst_topology_state {         struct drm_private_state= base;
         struct list_head= vcpis;
         struct drm_dp_m= st_topology_mgr *mgr;
+       u8 total_ava= il_slots;
+       u8 start_slot;
 = };
 
 #define to_dp_mst_topology_mgr(x) container_of(x, str= uct drm_dp_mst_topology_mgr, base)
@@ -661,6 +663,16 @@ struct drm_dp_ms= t_topology_mgr {
          = */
         int pbn_div;
&nbs= p;
+       /**
+    = ;    * @total_avail_slots: 63 for 8b/10b, 64 for 128/132b+        */
+    = ;   u8 total_avail_slots;
+
+     =   /**
+        * @start_slot: 1 = for 8b/10b, 0 for 128/132b
+        *= /
+       u8 start_slot;
+
 &nb= sp;       /**
    &nbs= p;     * @funcs: Atomic helper callbacks
  = ;        */
@@ -806,6 +818,7 @@ int d= rm_dp_mst_get_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp=
 
 void drm_dp_mst_reset_vcpi_slots(struct drm_dp_mst_topo= logy_mgr *mgr, struct drm_dp_mst_port *port);
 
+void drm_dp_mst= _update_coding_cap(struct drm_dp_mst_topology_state *mst_state, uint8_t lin= k_coding_cap);
 
 void drm_dp_mst_deallocate_vcpi(struct dr= m_dp_mst_topology_mgr *mgr,
       &n= bsp;            = ;             s= truct drm_dp_mst_port *port);

-- 
= Cheers,
=09Lyude P= aul (she/her)
=09S= oftware Engineer at Red Hat
--=-IS1JWVDl8SN9TBIg44Fe--