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From: Jon Hunter <jonathanh@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Mikko Perttunen <mperttunen@nvidia.com>
Subject: Re: [PATCH 1/3] drm/tegra: vic: Implement explicit reset support
Date: Thu, 29 Nov 2018 15:11:56 +0000	[thread overview]
Message-ID: <6a3fe707-1ec0-301b-8656-99876dac87a2@nvidia.com> (raw)
In-Reply-To: <20181129145121.GA23750@ulmo>


On 29/11/2018 14:51, Thierry Reding wrote:
> On Thu, Nov 29, 2018 at 01:40:32PM +0000, Jon Hunter wrote:
>>
>> On 23/11/2018 12:06, Thierry Reding wrote:
>>> From: Thierry Reding <treding@nvidia.com>
>>>
>>> Tegra supports generic PM domains on 64-bit ARM, and if that is enabled,
>>> the power domain code will make sure that resets are asserted and
>>> deasserted at appropriate points in time.
>>>
>>> If generic PM domains are not implemented, such as on 32-bit Tegra, the
>>> resets need to be asserted and deasserted explicitly by the driver.
>>>
>>> Signed-off-by: Thierry Reding <treding@nvidia.com>
>>> ---
>>>  drivers/gpu/drm/tegra/vic.c | 35 ++++++++++++++++++++++++++++++++++-
>>>  1 file changed, 34 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c
>>> index 9fa77405db01..23f530db45ad 100644
>>> --- a/drivers/gpu/drm/tegra/vic.c
>>> +++ b/drivers/gpu/drm/tegra/vic.c
>>> @@ -38,6 +38,7 @@ struct vic {
>>>  	struct iommu_domain *domain;
>>>  	struct device *dev;
>>>  	struct clk *clk;
>>> +	struct reset_control *rst;
>>>  
>>>  	/* Platform configuration */
>>>  	const struct vic_config *config;
>>> @@ -56,13 +57,37 @@ static void vic_writel(struct vic *vic, u32 value, unsigned int offset)
>>>  static int vic_runtime_resume(struct device *dev)
>>>  {
>>>  	struct vic *vic = dev_get_drvdata(dev);
>>> +	int err;
>>> +
>>> +	err = clk_prepare_enable(vic->clk);
>>> +	if (err < 0)
>>> +		return err;
>>> +
>>> +	usleep_range(2000, 4000);
>>
>> The Tegra genpd code has a usleep_range(10, 20), is that not sufficient
>> here? If it is, it would be good to be consistent.
> 
> Yeah, I think that's enough. The Tegra DRM driver uses these ranges in
> many places, so that's where I copied them from. None of these are part
> of a hot path or anything, so whether this sleeps for 10 ns or 4 ms is
> not going to matter much.
> 
> With that changed, can I consider this R-b you?

Yes please add my r-b.

Thanks
Jon

-- 
nvpublic
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      reply	other threads:[~2018-11-29 15:12 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-23 12:06 [PATCH 1/3] drm/tegra: vic: Implement explicit reset support Thierry Reding
2018-11-23 12:06 ` [PATCH 2/3] drm/tegra: falcon: Fix error handling Thierry Reding
2018-11-23 12:06 ` [PATCH 3/3] drm/tegra: falcon: Wait for memory scrubbing to complete Thierry Reding
2018-11-29 13:40 ` [PATCH 1/3] drm/tegra: vic: Implement explicit reset support Jon Hunter
2018-11-29 14:51   ` Thierry Reding
2018-11-29 15:11     ` Jon Hunter [this message]

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